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12
User’s Manual U12697EJ4V1UD
CONTENTS
CHAPTER 1 OVERVIEW ....................................................................................................................
31
1.1
Features .................................................................................................................................
33
1.2
Ordering Information ............................................................................................................
34
1.3
Pin Configuration (Top View) ..............................................................................................
35
1.4
Block Diagram .......................................................................................................................
36
1.5
Function List .........................................................................................................................
39
1.6
Differences Between
PD784225 Subseries Products and PD784225Y Subseries
Products ................................................................................................................................
42
CHAPTER 2 PIN FUNCTIONS ...........................................................................................................
43
2.1
Pin Function List ...................................................................................................................
43
2.2
Pin Function Description .....................................................................................................47
2.3
Pin I/O Circuits and Recommended Connection of Unused Pins ....................................
53
CHAPTER 3 CPU ARCHITECTURE ..................................................................................................57
3.1
Memory Space ......................................................................................................................
57
3.2
Internal ROM Area ................................................................................................................
61
3.3
Base Area ..............................................................................................................................
62
3.3.1
Vector table area .......................................................................................................................
63
3.3.2
CALLT instruction table area .....................................................................................................
64
3.3.3
CALLF instruction entry area ....................................................................................................
64
3.4
Internal Data Area .................................................................................................................
65
3.4.1
Internal RAM area .....................................................................................................................
66
3.4.2
Special function register (SFR) area .........................................................................................
68
3.4.3
External SFR area ....................................................................................................................
68
3.5
External Memory Space .......................................................................................................
68
3.6
PD78F4225 Memory Mapping ............................................................................................ 69
3.7
Control Registers ..................................................................................................................
70
3.7.1
Program counter (PC) ...............................................................................................................
70
3.7.2
Program status word (PSW) .....................................................................................................
70
3.7.3
Using the RSS bit ......................................................................................................................
73
3.7.4
Stack pointer (SP) .....................................................................................................................
75
3.8
General-Purpose Registers .................................................................................................
79
3.8.1
Structure ...................................................................................................................................
79
3.8.2
Functions ..................................................................................................................................
81
3.9
Special Function Registers (SFRs) .....................................................................................
84
3.10 Cautions ................................................................................................................................
89
CHAPTER 4 CLOCK GENERATOR ..................................................................................................
90
4.1
Functions ...............................................................................................................................
90
4.2
Configuration ........................................................................................................................
90
4.3
Control Registers ..................................................................................................................
92
4.4
System Clock Oscillator .......................................................................................................
97