
CHAPTER 18 CLOCKED SERIAL INTERFACE A (CSIA) WITH AUTOMATIC TRANSMIT/RECEIVE FUNCTION
User’s Manual U16890EJ1V0UD
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18.4.2 3-wire serial I/O mode with automatic transmit/receive function
Up to 32 bytes of data can be transmitted/received without using software in the mode in which the CSIMAn.ATEn
bit is set to 1. After communication is started, only data of the set number of bytes stored in RAM in advance can be
transmitted, and only data of the set number of bytes can be received and stored in RAM.
The 3-wire serial I/O mode with automatic transmit/receive function is controlled by the following registers.
Serial operation mode specification register n (CSIMAn)
Serial status register n (CSISn)
Serial trigger register n (CSITn)
Divisor selection register n (BRGCAn)
Automatic data transfer address point specification register n (ADTPn)
Automatic data transfer interval specification register n (ADTIn)
Remarks 1.
For the alternate-function pin settings, refer to
Table 4-16 Settings When Port Pins Are Used for
Alternate Functions
.
2.
n = 0, 1
(1) Automatic transmit/receive data setting
(a) Transmit data setting
<1> Write transmit data from the least significant address FFFFFE00H/FFFFFE20H of buffer RAM (up to
FFFFFE1FH/FFFFFE3FH at maximum). The transmit data should be in the order from lower
address to higher address.
<2> Set the ADTPn register to the value obtained by subtracting 1 from the number of transmit data
bytes.
(b) Automatic transmission/reception mode setting
<1> Set the CSIMAn.CSIAEn bit and the CSIMAn.ATEn bit to 11.
<2> Set the CSIMAn.RXEAn bit and the CSIMAn.TXEAn bit to 11.
<3> Set a data transfer interval in the ADTIn register.
<4> Set the CSITn.ATSTAn bit to 1.
The following operations are automatically carried out when (a) and (b) are carried out.
After the buffer RAM data indicated by the ADTCn register is transferred to the SIOAn register,
transmission is carried out (start of automatic transmission/reception).
The received data is written to the buffer RAM address indicated by the ADTCn register.
ADTCn register is incremented and the next data transmission/reception is carried out. Data
transmission/reception continues until the ADTCn register incremental output matches the set value of
the ADTPn register (end of automatic transmission/reception). However, if the CSIMAn.ATMn bit is set
to 1 (continuous transfer mode), the ADTCn register is cleared after a match between the ADTPn and
ADTCn registers, and then repeated transmission/reception is started.
When automatic transmission/reception is terminated, the CSISn.TSFn bit is cleared to 0.
Caution Determine the setting procedure of alternate-function pins considering the relationship
with the communication partner.
Remark
n = 0, 1