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參數(shù)資料
| 型號： | UPD16879 |
| 廠商： | NEC Corp. |
| 英文描述： | MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| 中文描述： | 單片四H橋驅(qū)動電路 |
| 文件頁數(shù)： | 7/32頁 |
| 文件大?。?/td> | 199K |
| 代理商： | UPD16879 |
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Data Sheet S14188EJ1V0DS00
7
μ
PD16879
PIN FUNCTION
Package: 38-pin plastic shrink SOP
Pin
Pin name
Pin function
1
LGND
Control circuit GND pin
2
C
OSC
Chopping capacitor connection pin
α
1 ch filter capacitor connection pin
α
2 ch filter capacitor connection pin
β
1 ch filter capacitor connection pin
β
2 ch filter capacitor connection pin
Reference voltage input pin (250 mV typ)
3
FIL
A
4
FIL
B
5
FIL
C
6
FIL
D
7
V
REF
Note 1
8
V
DD
Control circuit supply voltage input pin
9
V
M3
Output circuit supply voltage input pin
β
2 ch output pin
β
2 ch sense resistor connection pin
β
2 ch output pin
Output circuit supply voltage input pin
β
1 ch output pin
β
1 ch sense resistor connection pin
β
1 ch ouptut pin
External extension pin (open drain)
10
D
2
11
FB
D
12
D
1
13
V
M4
14
C
2
15
FB
C
16
C
1
17
EXP0
18
EXP1
External extension pin (open drain)
19
V
REFsel
Reference voltage select pin
Note 1
20
PGND
EXT
α
EXT
β
V
M1
Output circuit GND pin
α
ch logic circuit monitor pin
β
ch logic circuit monitor pin
Output circuit supply voltage input pin
α
1 ch output pin
α
1 ch sense resistor connection pin
α
1 ch output pin
Output circuit supply voltage input pin
α
2 ch output pin
α
2 ch sense resistor connection pin
α
2 ch output pin
Video sync signal input pin
21
22
23
24
A
1
25
FB
A
26
A
2
27
V
M2
28
B
1
29
FB
B
30
B
2
31
V
D
Note 2
32
V
D
Video sync signal input pin
Note 2
33
LATCH
LATCH signal input pin
34
SDATA
Serial data input pin
35
SCLK
Serial clock input pin (4.5 MHz typ)
36
OSC
IN
Original oscillation input pin (4.5 MHz typ)
37
OSC
OUT
Original oscillation output pin
38
RESET
Reset signal input pin
Remark
Plural terminal (V
M
) is not only 1 terminal and connect all terminals.
Notes 1.
A standard voltage to use is chosen.
V
REFsel
: High level
using external input V
REF
V
REFsel
: Low level
using internal reference voltage (V
REF
pin fixed GND level)
2.
Input the video sync singnal to V
D
pin or V
D
pin. A free terminal is to do the following treatment.
When input V
D
: V
D
pin connect to V
DD
pin.
When input V
D
: V
D
pin connect to GND pin.
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