- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383980 > UPD16878 (NEC Corp.) MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT PDF資料下載
參數(shù)資料
| 型號： | UPD16878 |
| 廠商： | NEC Corp. |
| 英文描述： | MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| 中文描述： | 單片四H橋驅(qū)動電路 |
| 文件頁數(shù)： | 10/32頁 |
| 文件大小： | 242K |
| 代理商： | UPD16878 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁當(dāng)前第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
Data Sheet S15974EJ1V0DS
10
μ
PD16878
<4th byte> <4th byte>
Bit
Data
Function
Setting
Bit
Data
Function
Setting
D7
1 or 0
OSCSEL
Internal/external
D7
1 or 0
Current Set
α
set2/set1
D6
0
-
-
D6
D5
0
-
-
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
5-bit data
input
Chopping
Frequency
Chopping
frequency :
32 to 124 kHz
Setting
(8 to 31)
Note
f = 4 kHz
D0
15-bit data
High-order
7-bit data
input
α
Pulse Width
α
ch
pulse cycle :
0.25 to 8191.75
μ
s
Setting
(1 to 32767)
t = 0.25
μ
s
Note
The frequency is 0 kHz if 0 to 7 is input.
<5th byte>
<5th byte>
Bit
Data
EXT
α
EXT
β
Bit
Data
Function
Setting
D7
0
-
-
D7
1 or 0
β
ROTATION
β
ch CCW/CW
D6
Note 5
ENABLE
α
Note1
ENABLE
β
Note1
D6
1 or 0
β
ENABLE
β
ch ON/OFF
D5
Note 5
ROTATION
α
Note2
ROTATION
β
Note2
D5
D4
Note 5
Pulse Out
α
Pulse Out
β
D4
D3
Note 5
FF7
α
FF7
β
D3
D2
Note 5
FF3
α
FF3
β
D2
D1
Note 5
Checksum
Note3
FF2
β
D1
D0
Note 5
Chopping
Note4
FF1
β
D0
6-bit data
input
β
Pulse Number
β
ch
Number of
pulses in 1 VD
Setting (1 to 63)
n = 2 pulses
Note
Notes 1.
H level : Conducts, L level : Stops
2.
H level : Reverse (CCW),
L level : Forward (CW)
3.
H level : Normal data input,
L level : Abnormal data input
4.
Not output in internal oscillation mode.
5.
Select one of D0 to D6 and input
“
1
”
.
If two or more of D0 to D6 are selected,
they are positively ORed for output.
Note
The number of pulses can be varied in 2-pulse
steps.
<6th byte>
<6th byte>
Bit
Data
Function
Setting
Bit
Data
Function
Setting
D7
D7
D6
D6
D5
D5
D4
4-bit data
input
α
ch
Current Set2
α
ch Output current
setting 2
EVR : 100
to 250 mV
Setting (0 to 15)
Note
D4
D3
D3
D2
D2
D1
D1
D0
4-bit data
input
α
ch
Current Set1
α
ch Output current
setting 1
EVR : 100
to 250 mV
Setting (0 to 15)
Note
D0
15-bit data
Low-order
8-bit data
input
β
Pulse Width
β
ch pulse
cycle:
0.25 to 8191.75
μ
s
Setting
(1 to 32767)
t = 0.25
μ
s
Note
A voltage of about double EVR is output to
the FIL pin.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPD16879GS-BGG | MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| UPD16879 | MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| UPD1703C-011 | PHASE LOCKED LOOP FREQUENCY SYNTHESIZER FM/AM DIGITAL TUNING SYSTEM CONTROLLER CMOS LSI |
| UPD1703C-013 | PHASE LOCKED LOOP FREQUENCY SYNTHESIZER FM/AM DIGITAL TUNING SYSTEM CONTROLLER CMOS LSI |
| UPD1703C-014 | PLL FREQUENCY SYMTHESIZER AND CONTROLLER FOR FM AND AM TUNER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD16878GS-BGG | 制造商:NEC 制造商全稱:NEC 功能描述:MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| UPD16879 | 制造商:NEC 制造商全稱:NEC 功能描述:MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| UPD16879GS-BGG | 制造商:NEC 制造商全稱:NEC 功能描述:MONOLITHIC QUAD H BRIDGE DRIVER CIRCUIT |
| UPD16882 | 制造商:NEC 制造商全稱:NEC 功能描述:MONOLITHIC CD-ROM/DVD-ROM 3-PHASE SPINDLE MOTOR DRIVER |
| UPD16882GS | 制造商:NEC 制造商全稱:NEC 功能描述:MONOLITHIC CD-ROM/DVD-ROM 3-PHASE SPINDLE MOTOR DRIVER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。