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參數(shù)資料
| 型號(hào)： | UPD16682W |
| 廠商： | NEC Corp. |
| 英文描述： | 1/65 DUTY LCD CONTROLLER/DRIVER WITH ON-CHIP RAM |
| 中文描述： | 1 / 65稅LCD控制器/驅(qū)動(dòng)器，片內(nèi)RAM |
| 文件頁(yè)數(shù)： | 30/56頁(yè) |
| 文件大?。?/td> | 435K |
| 代理商： | UPD16682W |
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Data Sheet S13368EJ3V0DS00
30
μ
PD16682
12.8 ADC Select (Segment Driver Direction Select)
This command inverts the relation between the display data RAM’s column address and segment driver output, as
was shown in Figure 6
2. Consequently, the segment driver output pin number can be inverted by this command.
For details, see
6.3 Column Address Circuit.
Incrementation (+1) of the column address when display data is
either written or read is performed according to the column address shown in Figure 6
2.
This command should be input during initialization.
A0
E, /RD
R,/W, /WR
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Setting
0
1
0
1
0
1
1
0
0
0
0
Normal (forward direction)
1
Inverted (reverse direction)
12.9 Display Normal/Inverted
This command can be used to invert the display ON/OFF control without replacing any of the display data RAM
contents. The display data RAM contents are retained when this command is executed.
A0
E, /RD
R,/W, /WR
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Setting
0
1
0
1
0
1
0
0
1
1
0
RAM data: H
LCD ON potential (normal)
1
RAM data: L
LCD ON potential (inverted)
12.10 Display All ON/OFF
This command can be used to set the display all ON status forcibly regardless of the display data RAM contents.
The display data RAM contents are retained when this command is executed.
This command takes priority over the display normal/inverted command.
A0
E, /RD
R,/W, /WR
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Setting
0
1
0
1
0
1
0
0
1
0
0
Normal display mode
1
Display all ON
12.11 LCD Bias Set
This command selects the bias setting of the voltage required to drive the LCD. This command is valid when the
power supply circuit’s V/F circuit is operating.
A0
E, /RD
R,/W, /WR
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
Setting
0
1
0
1
0
1
0
0
0
1
0
1/9 bias
1
1/7 bias
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