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參數(shù)資料
| 型號： | UPC1830 |
| 廠商： | NEC Corp. |
| 元件分類： | DC/DC變換器 |
| 英文描述： | RSO-S_D(Z) Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 15V; Power: 1W; 2:1 and 4:1 Wide Input Voltage Ranges; 1kVDC, 2kVD & 3kVDC Isolation; UL94V-0 Package Material; Continuous Short Circuit Protectionwith Current Foldback; Low Noise; No External Capacitor needed; Efficiency to 83% |
| 中文描述： | 過濾含視頻色度，同步信號處理LSI兼容NTSC制式/ PAL制 |
| 文件頁數(shù)： | 16/44頁 |
| 文件大小： | 338K |
| 代理商： | UPC1830 |
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μ
PC1830
16
5.3 Matrix Section
(1) Input signal
Brightness input signal
After coupling by a capacitor (0.22
μ
F), a brightness signal which has 1 V
p-p
of video part is input to the Y input
pin (pin 16).
Color difference input signal
After coupling by a capacitor (0.22
μ
F), 1 V
p-p
R-Y and B-Y signals are input to the R-Y and B-Y input pins
(pins 18 and 19).
(2) Y, R-Y and B-Y input clamp circuit
Clamps Y, R-Y and B-Y signals when the voltage of the clamp pulse input pin (pin 22) is 2.8 V or higher.
Input a clamp pulse to the clamp pulse input pin (pin 22) in synchronization with the burst section of an input signal
as shown in Figure 5-3.
In the application circuit example, adjust the position of the clamp pulse by DELAY (
μ
PD4538B external variable
resistor: 10 k
) and the clamp pulse width by PD (
μ
PD4538B external variable resistor: 10 k
).
Figure 5-3. 22-Pin Input Clamp Pulse Waveform
(3) Amplification color control circuit
Adjusts the amplitude of a color difference signal input to the R-Y input pin (pin 18) and B-Y input pin (pin 19) according
to the voltage of the color control pin (pin 20). This controls the color density on the screen.
When using a matrix, adjust the color density mainly using this color control and fix the voltage of the subcolor control
pin (pin 37) at 2 V (TYP.).
The control characteristic is shown in Figure 5-4.
Video signal
Composite
video input
22-pin input
clamp pulse
Burst signal
Clamp operates at 2.8 V or higher.
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