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參數(shù)資料
| 型號： | UCB1500 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI to AC97 bridge/host controller |
| 中文描述： | PCI BUS CONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80 |
| 文件頁數(shù)： | 8/58頁 |
| 文件大?。?/td> | 1001K |
| 代理商： | UCB1500 |
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Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
8 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
[07-06]: Status Register
[08]: Revision ID (read only):
Current revision of chip = 1.
[0B-09]: Class Code Register (read only):
Value = 070300h for simple
communication controller, generic modem. Programmable through EEPROM
interface or register 47-45h.
[0C]: Cache Line Size (read only):
Always 0; no cache supported.
[0D]: Latency Timer
[0E]: Header Type (read only):
If multifunction device, value is 80h otherwise 00h.
Table 6:
Bit
15
Status Register bit description
Description
PERR detected
Set to ‘1’ whenever parity error is detected. Write ‘1’ to clear.
SERR asserted
Set to ‘1’ if UCB1500 asserted SERR. Write ‘1' to clear.
Received master abort
If set, UCB1500 has received master abort during its slave operation. Write ‘1’ to
clear.
Received target abort
If set, UCB1500 has received target abort during its master operation. Write `1'
to clear
Target abort
Always ‘0’; UCB1500 never signals target abort.
Timing
Always 01b; wait state during slave access to UCB1500.
PERR reported
Not implemented, always 0.
Fast back-to-back capable
Always ‘1’; NO wait state between PCI cycles.
User Definable features
Always ‘0’; device does not support user definable features.
66 MHz capable bit
Always ‘0’; device is 33 MHz device only.
Capabilities bit
(read only)
Always ‘1’; capabilities present.
Reserved.
14
13
12
11(r)
10-9(r)
8
7(r)
6(r)
5(r)
4(r)
3-0
Table 7:
Bit
7-4
Latency Timer register bit description
Description
Latency Timer
Bits 7-4 of the latency timer, in units of PCI clocks * 16.
Latency Timer
These bits are read only and are always 0000b, giving timer granularity of 16 PCI
clocks.
3-0(r)
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