參數(shù)資料
型號(hào)： UCB1500
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： PCI to AC97 bridge/host controller
中文描述： PCI BUS CONTROLLER, PQFP80
封裝： 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80
文件頁(yè)數(shù)： 44/58頁(yè)
文件大小： 1001K
代理商： UCB1500
Philips Semiconductors
UCB1500
PCI to AC97 bridge/host controller
Objective specification
Rev. 01 — 4 February 2000
44 of 58
9397 750 06854
Philips Electronics N.V. 2000. All rights reserved.
9.1 Transmit Descriptor Table format
Table 67: Transmit Descriptor Table format
Description
BASEADDR
Base address of the data buffer if the DT Link bit is not enabled.
Link pointer if the DT Link bit is enabled.
COUNT
Byte count of data buffer
CMD/STT
Command/status register (refer to
Table 68
).
Table 68: Command/status register bit description
Bit
Description
15
DT termination bit:
If set, the current entry is the last entry of the DT. If link-bit is
‘1’, the address field contains an address for the next DT table. Otherwise, the
address field contains the buffer address for the current pacet data.
14
Should always be set to 1.
13
Invalid entry bit:
If set, it means that the current descriptor entry is not a valid
entry. For transmission, this means that all the data pointed to by the descriptor
has been transmitted. If the UCB1500 reads a descriptor entry with this bit set, it
enters the hold condition (see hold condition section).
12-8
Reserved.
7
DT Link bit:
If set, the current descriptor entry is a link pointer to another
descriptor table. This bit is only valid when both bit[15] and bit[7] are set to 1.
Otherwise, this bit is undefined.
6
Interrupt bit:
Generate Transmit DMA done interrupt at the completion of this
DT data entry.
5-0
Reserved.
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