參數(shù)資料
型號(hào)： UAA3522HL
廠商： NXP SEMICONDUCTORS
元件分類： 無(wú)繩電話/電話
英文描述： Low power dual-band GSM transceiver with an image rejecting front-end
中文描述： TELECOM, CELLULAR, RF FRONT END CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-313-2, LQFP-48
文件頁(yè)數(shù)： 9/28頁(yè)
文件大?。?/td> 148K
代理商： UAA3522HL
2
9
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Table 4
X = don’t care; MSB = Most Significant Bit; LSB = Least Significant Bit.
Register bit allocation
Notes
1.
2.
Bit LNA: 1 = LNA ON in RX mode; 0 = LNA OFF in RX mode.
Bits Q sign and I sign = polarity of offset at Q/I channel outputs: 0 = negative offset step (output A with respect to output B); 1 = positive offset step
(output A with respect to output B).
Bit IF RD: 0 = frequency dividers programmed for GSM applications; 1 = frequency dividers programmed for DCS applications.
Bit IF VCO: 0 = IF LO buffer ON (external IF LO source connected); 1 = IF VCO ON (external IF LO source not connected).
Bit RF: 1 = RF section ON when RX mode is activated; 0 = RF section OFF when RX mode is activated.
This address must not be used. Data bits to be defined.
3.
4.
5.
6.
DATA BITS
ADDRESS BITS
FIRST
BIT
LAST
BIT
13
12
11
10
9
8
7
6
5
4
3
2
1
0
3
2
1
0
X
X
X
X
X
X
MSB
IF LO frequency divider ratio
LSB
LSB
LSB
0
0
0
1
1
0
1
0
1
0
0
1
MSB
X
RF LO frequency divider ratio
LNA
(1)
X
X
X
X
X
X
MSB
AGC amplifier gain (RX mode)
see Table 5
I output offset adjust
X
X
MSB
Q output offset adjust
LSB
Q sign
(2)
MSB
LSB
I sign
(2)
0
0
1
0
X
X
X
X
X
IF RD
(3)
IF VCO
(4)
0
0
RF
(5)
X
SYN ON
RX ON
TX ON
0
0
0
1
For test purposes only
(6)
0
0
0
0
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