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參數(shù)資料
| 型號： | TXS02326MRGER |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 17/35頁 |
| 文件大小： | 0K |
| 描述： | IC SIM CARD MUX 2:1 24VQFN |
| 產(chǎn)品培訓(xùn)模塊： | Voltage Level Translation |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 應(yīng)用： | 移動(dòng)電話 |
| 接口： | I²C |
| 電源電壓： | 1.7 V ~ 3.3 V |
| 封裝/外殼： | 24-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-VQFN 裸露焊盤（4x4） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 安裝類型： | 表面貼裝 |
| 其它名稱： | 296-28065-6 |
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TXS02326
VDDIO
GND
VSIM2
VBAT
VSIM1
0.1 F
1 F
SCES795C
– SEPTEMBER 2010 – REVISED FEBRUARY 2011
APPLICATION INFORMATION
The LDO
’s included on the TXS02326 achieve ultra-wide bandwidth and high loop gain, resulting in extremely
high PSRR at very low headroom (VBAT – VSIM1/2). The TXS02326 provides fixed regulation at 1.8V or 2.95V.
Low noise, enable (through I2C control), low ground pin current make it ideal for portable applications. The device
offers sub-bandgap output voltages, current limit and thermal protection, and is fully specified from
–40°C to
+85
°C.
Figure 9. Typical Application circuit for TXS02326
Input and Output Capacitor Requirements
It is good analog design practice to connect a 1.0
μF low equivalent series resistance (ESR) capacitor across the
input supply (VBAT) near the regulator. Also, a 0.1uF is required for the logic core supply (VDDIO).
This capacitor will counteract reactive input sources and improve transient response, noise rejection, and ripple
rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or if
the device is located several inches from the power source. The LDO
’s are designed to be stable with standard
ceramic capacitors of values 1.0
μF or larger. X5R- and X7R-type capacitors are best because they have
minimal variation in value and ESR over temperature. Maximum ESR should be
< 1.0 Ω.
Output Noise
In most LDO
’s, the bandgap is the dominant noise source. To improve ac performance such as PSRR, output
noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN
and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground
connection for the bypass capacitor should connect directly to the GND pin of the device.
Internal Current Limit
The TXS02326 internal current limit helps protect the regulator during fault conditions. During current limit, the
output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the
device should not be operated in a current limit state for extended periods of time.
The PMOS pass element in the TXS02326 has a built-in body diode that conducts current when the voltage at
VSIM1/2 exceeds the voltage at VBAT. This current is not limited, so if extended reverse voltage operation is
anticipated, external limiting may be appropriate.
Dropout Voltage
The TXS02326 uses a PMOS pass transistor to achieve low dropout. When (VBAT – VSIM1/2) is less than the
dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output
resistance is the RDS(ON) of the PMOS pass element. VDO will approximately scale with output current because
the PMOS device behaves like a resistor in dropout.
Startup
The TXS02326 uses a quick-start circuit which allows the combination of very low output noise and fast start-up
times. Note that for fastest startup, VBATT should be applied first, and then enabled by asserting the I
2C register.
24
2010–2011, Texas Instruments Incorporated
Product Folder Link(s): TXS02326
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