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| 型號(hào)： | TWR-MECH |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 20/46頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT TOWER ROBOT SENSOR MOTOR |
| 視頻文件： | Freescale Tower Overview - Another Geek Moment Freescale Tower Labs 1 & 2 - Another Geek Moment |
| 設(shè)計(jì)資源： | Tower Mechanical Drawing |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ColdFire® |
| 主要目的： | 機(jī)器人 |
| 嵌入式： | 是，MCU，32 位 |
| 已用 IC / 零件： | MCF52259，MMA8451Q，MPR121 |
| 主要屬性： | 32 位 MCU，3 軸加速傳感器，接觸式傳感器 |
| 已供物品： | 板 |
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MCF52259 ColdFire Microcontroller, Rev. 5
Electrical Characteristics
Freescale
27
100 LQFP
Junction to ambient, natural convection
Single layer board (1s)
JA
C/W
Junction to ambient, natural convection
Four layer board (2s2p)
JA
C/W
Junction to ambient, (@200 ft/min)
Single layer board (1s)
JMA
C/W
Junction to ambient, (@200 ft/min)
Four layer board (2s2p)
JMA
C/W
Junction to board
—
JB
2516
C/W
Junction to case
—
JC
C/W
Junction to top of package
Natural convection
jt
C/W
Maximum operating junction temperature
—
Tj
105
oC
1
JA and jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
2 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
3 Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
4 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
5 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
6 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
7
JA and jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
8 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
9 Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
10 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
11 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
12 Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
13
JA and jt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
JA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
14 Per JEDEC JESD51-2 with the single-layer board (JESD51-3) horizontal.
15 Per JEDEC JESD51-6 with the board JESD51-7) horizontal.
Table 8. Thermal Characteristics (continued)
Characteristic
Symbol
Value
Unit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NRS6012T100MMGJ | INDUCTOR POWER 10UH 1.2A SMD |
| REC5-243.3DRWZ/H4/C | CONV DC/DC 5W 9-36VIN +/-3.3V |
| UPJ1C101MED1TD | CAP ALUM 100UF 16V 20% RADIAL |
| 342A012-12-0 | BOOT MOLDED |
| REC5-243.3DRWZ/H4/A | CONV DC/DC 5W 9-36VIN +/-3.3V |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TWR-MEM | 功能描述:存儲(chǔ)器 IC 開發(fā)工具 Memory Module for Tower RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Reference Boards 工具用于評(píng)估:M24LR64-R 存儲(chǔ)容量:64 kbit 存儲(chǔ)類型:EEPROM 工作電源電壓:1.8 V to 5.5 V |
| TWR-MEM | 制造商:Freescale Semiconductor 功能描述:TOWER SYSTEM - MEMORY CONTROLL |
| TWR-MEM-PISMO | 功能描述:存儲(chǔ)器 IC 開發(fā)工具 Tower Memory Pismo RoHS:否 制造商:STMicroelectronics 產(chǎn)品:Reference Boards 工具用于評(píng)估:M24LR64-R 存儲(chǔ)容量:64 kbit 存儲(chǔ)類型:EEPROM 工作電源電壓:1.8 V to 5.5 V |
| TWR-METRO-KIT-EU | 功能描述:WiFi/802.11開發(fā)工具 TWR-METRO-KIT FOR EU RoHS:否 制造商:Roving Networks 產(chǎn)品:Evaluation Boards 工具用于評(píng)估:RN-171 支持協(xié)議:802.11 b/g 頻率:2.4 GHz 接口類型:UART 工作電源電壓:2 V to 16 V |
| TWR-METRO-KIT-JA | 功能描述:WiFi/802.11開發(fā)工具 TWR-METRO-KIT FOR JA RoHS:否 制造商:Roving Networks 產(chǎn)品:Evaluation Boards 工具用于評(píng)估:RN-171 支持協(xié)議:802.11 b/g 頻率:2.4 GHz 接口類型:UART 工作電源電壓:2 V to 16 V |
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