參數(shù)資料
型號: TVP6000CPFP
廠商: Texas Instruments, Inc.
英文描述: NTSC/PAL Digital Video Encoder
中文描述: NTSC / PAL數(shù)字視頻編碼器
文件頁數(shù): 26/57頁
文件大?。?/td> 268K
代理商: TVP6000CPFP
2–14
Table 2–6. Slave Mode Signals
PIN NAME
I/O TYPE
DESCRIPTION
LLC
Input
Line locked clock with 2X pixel clock frequency. CDIR pin is tied high.
Data phase reference clock. CDIR pin is tied high.
Output Vertical/Field timing, can be programmed as VSO/FSO/FSEQO
Can be programmed as VSI/FSI/FSEQI.
Programmed as CBNI.
Programmed as HSI.
CREF
Input
RCM1
Output
RCV1
Input
RCM2
Input
RCV2
Input
Refer to Table 2–15 and Table 2–17 for the definition of VSO, FSO, FSEQO, HSO, VSI, FSI, FSEQI, CBNI,
and HSI.
2.10.3
Demand mode is an interface specially designed for scan conversion. When scan conversion is enabled,
the TVP6000 accepts non-interlaced pixel data, performs signal processing functions which include
non-interlace-to-interlace conversion, flicker filtering and overscan-compensation, and outputs interlaced
NTSC/PAL video. Due to the nature of the functions that the TVP6000 performs during scan conversion,
the bandwidth of the input pixel increases and exceeds what the master and slave mode interface can
provide. Demand mode provides extra bandwidth to meet the needs of the TVP6000.
Demand Mode
Unlike master mode and slave mode, the video port interface timing for demand mode is decoupled from
the timing of the internal encoder core.
The TVP6000 operates in demand mode when it requests data from an external graphics controller or an
MPEG device. Demand mode is enabled by setting SCM[0] = 1, the SCN bit.
In demand mode, the TVP6000 asserts the RCM2 pin high to request additional data from the external
source and negates the RCM2 pin to stop additional data transfer. Table 2–19 shows how the RCM2 pin
may be programmed to operate as a request signal during demand mode. In addition, the NLR register is
used to program the threshold where the RCM2 pin is toggled for requests.
2.10.4
The TVP6000 may be configured in a genlock mode to an external TV decoder such as the
TVP5000/TVP5010 device. This configuration allows the decoder to drive video timing information to the
TVP6000 encoder. The genlock mode is used to control clock jitter and thus allows the encoder to generate
accurate color burst information.
Genlock Mode
In this configuration, GLCI pin is connected to the GLCO pin of the decoder, and the line-lock clock pin, LLC,
is fed by the decoder main pixel clock output. Moreover, the color sub-carrier information is formatted as
a 23-bit binary number and is transmitted serially. The transmission timing diagram is shown in Figure 2–13.
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