參數(shù)資料
型號(hào)： TVP6000CPFP
廠商： Texas Instruments, Inc.
英文描述： NTSC/PAL Digital Video Encoder
中文描述： NTSC / PAL數(shù)字視頻編碼器
文件頁(yè)數(shù)： 25/57頁(yè)
文件大?。?/td> 268K
代理商： TVP6000CPFP
2–13
2.9.4
The RCM2 pin may be configured as an input or an output as shown in Table 2–19. The polarity of the RCM2
pin is programmable via this register as well.
RCM2
As an output, this pin may be operated as a horizontal sync, composite blank, or a demand mode data
request signal. As in input, this pin is always a composite blanking input.
When scan-conversion is enabled, the demand mode video port interface is activated and the RCM2 pin
acts as the request output pin.
2.10 Modes of Operation
With a highly programmable video port interface, the TVP6000 may be configured to operate in various
modes, each tailored for a target application. In the following sections, several of the most commonly used
modes are described.
2.10.1
In the master mode, the TVP6000 generates all of the video timing signals for controlling an external
graphics controller or MPEG decoder device. Table 2–4 lists the timing signals that are output from the
TVP6000 during master mode.
Master Mode
Table 2–4. Master Mode
PIN NAME
LLC
CREF
RCM1
RCV1
I/O TYPE
Input/output
Input/output
Output
Output
DESCRIPTION
Line locked clock; with 2X pixel clock frequency.
Data phase reference clock.
Output vertical/field timing, can be programmed as VSO/FSO/FSEQO
Output vertical/field timing, can be programmed as VSO/FSO/FSEQO
Output horizontal timing, programmed as CBNO. Active duration is defined
by registers BMRQ and EMRQ, excluding vertical blanking interval.
Output horizontal timing, programmed as HSO. Active duration is defined
by registers BRCV and ERCV.
RCM2
Output
RCV2
Output
Refer to Table 2–15 and Table 2–17 for the definitions of VSO, FSO, FSEQO, and HSO.
A crystal with the correct frequency according to Table 2–5 should be connected between pins XTAL1 and
XTAL2.
Table 2–5. Crystal Frequencies
PIXEL RATE
CLOCK FREQUENCY
CCIR-601
27 MHz
27 MHz
Square pixel
24.5454 MHz
29.5 MHz
2.10.2
In slave mode, all clock and video timing signals are supplied from an external source. The source may be
a graphics controller, an MPEG device, or a TV decoder such as the TVP5010/TVP5020 decoders.
Table 2–6 lists the signal definitions for slave mode.
Slave Mode
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