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| 型號： | TUA6100B6 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | Components for Satellite Receiver Units |
| 中文描述： | 元件衛(wèi)星接收單元 |
| 文件頁數(shù)： | 25/46頁 |
| 文件大?。?/td> | 819K |
| 代理商： | TUA6100B6 |
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Preliminary Specification
TUA6100B6
High-Frequency-Products
20
26.1.01
Parameter
see also
I
2
C and 3-Wire-bus on page 26
Symbol
Limit Values
Unit
min.
max.
LOW level input voltage
(DATA, CLOCK, ENABLE, BUS_MODE)
HIGH level input voltage
(DATA, CLOCK, ENABLE, BUS_MODE)
Hysteresis of Schmitt trigger inputs
Pulse width of spikes
which must be suppressed by the input filter
LOW level output voltage (DATA), only I2C-bus
at 3mA sink current
at 6mA sink current
Output fall time from V
IH min
to V
IL max
with
a bus capacitance from 10pF to 400pF
with up to 3mA sink current at V
OL
V
IL
-0.5
0.96
V
V
IH
2.24
5.5
V
V
Hys
1.12
V
t
SP
0
50
ns
V
OL
0
0.4
0.6
V
t
OF
20+0.1C
b1)
1) C
b
= capacitance of one bus line in pF
Note that the maximum t
F
for the SDA and SCL bus lines quoted in table above (300ns) is longer than the specified maximum t
OF
for the output stages (250ns).This allows series protection resistors to be connected between the SDA/SCL pins and the SDA/SCL
bus lines without exceeding the maximum specified t
F
.
2) only for I
2
C bus mode
250
ns
SCL clock frequency
Bus free time between a STOP and START condition
2)
Hold time (repeated) START condition.
After this period, the first clock pulse is generated. 2)
LOW period of the SCL clock
HIGH period of the SCL clock
Set-up time for a repeated START condition 2)
Data hold time
Data set-up time
Rise time, fall time of SDA and SCL signals
Set-up time for STOP condition 2)
Setup time BUS_ENA to SDA 2)
Setup time CLOCK to BUS_ENA
3)
H-pulse width (BUS_ENA) for new data protocol 3)
Capacitive load for each bus line
f
SCL
t
BUF
0
1.3
400
--
kHz
μs
t
HD.STA
0.6
--
μs
t
LOW
t
HIGH
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R
, t
F
t
SU.STO
t
SU.ENASDA
t
SU.SCLENA
t
WHEN
C
b
1.3
0.6
0.6
0
100
20+0.1C
b
1) 300
0.6
0.6
0.6
0.6
--
--
--
--
μs
μs
μs
ns
ns
ns
μs
μs
μs
μs
pF
--
--
--
--
--
400
3) only for I
2
C bus mode
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