參數資料
型號： TSC251G2DXXX-24CED
英文描述： IC CYCLONE III FPGA 80K 484 FBGA
中文描述： 微控制器
文件頁數： 29/63頁
文件大?。?/td> 878K
代理商： TSC251G2DXXX-24CED
29
Rev. A - May 7, 1999
TSC80251G2D
8.2.1 Lock Bit System
The TSC87251G2D products implement 3 levels of security for User’s program as described in Table 35. The
TSC83251G2D products implement only the first level of security.
Level 0 is the level of an erased part and does not enable any security features.
Level 1 locks the programming of the User’s internal Code Memory, the Configuration Bytes and the Encryption
Array.
Level 2 locks the verifying of the User’s internal Code Memory. It is always possible to verify the Configuration
Bytes and the Lock Bits. It is never possible to verify the Encryption Array.
Level 3 locks the external execution.
Table 35. Lock Bits Programming
Notes:
1. Returns encrypted data if Encryption Array is programmed.
2. Returns non encrypted data.
3. x means don’t care. Level 2 always enables level 1, and level 3 always enables levels 1 and 2.
The security level may be verified according to Table 36.
Table 36. Lock Bits Verifying
Note:
1. x means don’t care.
8.2.2 Encryption Array
The TSC83251G2D and TSC87251G2D products include a 128-byte Encryption Array located in non-volatile
memory outside the memory address space. During verification of the on-chip code memory, the seven low-order
address bits also address the Encryption Array. As the byte of the code memory is read, it is exclusive-NOR’ed
(XNOR) with the key byte from the Encryption Array. If the Encryption Array is not programmed (still all 1s),
the user program code is placed on the data bus in its original, unencrypted form. If the Encryption Array is
programmed with key bytes, the user program code is encrypted and cannot be used without knowledge of the
key byte sequence.
To preserve the secrecy of the encryption key byte sequence, the Encryption Array can not be verified.
Cautions:
1. When a MOVC instruction is executed, the content of the ROM is not encrypted. In order to fully protect the user program code, the lock
bit level 1 (see Table 35) must always be set when encryption is used.
2. If the encryption feature is implemented, the portion of the on-chip code memory that does not contain program code should be filled with
“random” byte values to prevent the encryption key sequence from being revealed.
Level
Lock bits
LB[2:0]
Internal
Execution
External
Execution
Verification
Programming
External
PROM read
(MOVC)
0
000
Enable
Enable
Enable
(1)
Enable
(1)
Enable
Enable
(2)
1
001
01x
(3)
1xx
(3)
Enable
Enable
Disable
Disable
2
Enable
Enable
Disable
Disable
Disable
3
Enable
Disable
Disable
Disable
Disable
Level
Lock bits Data
(1)
0
xxxxx000
1
xxxxx001
2
xxxxx01x
3
xxxxx1xx
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