參數(shù)資料
型號(hào): TRF2050PW
廠商: TEXAS INSTRUMENTS INC
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO20
封裝: PLASTIC, SO-20
文件頁數(shù): 22/34頁
文件大?。?/td> 543K
代理商: TRF2050PW
TRF2050
LOW-VOLTAGE 1.2-GHz FRACTIONAL-N/INTEGER-N SYNTHESIZER
SLWS030E– JUNE 1996 – REVISED OCTOBER 2000
29
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
reference divider
The input signal on REFIN is amplified by a single-ended, ac-coupled input buffer/amplifier that has sufficient
sensitivity for direct connection to a typical TCXO. The 12-bit (NR) reference divider total division ratio can be
expressed as:
NTotal = NR, where NR = 4 to 4095
A four-section postscaler is connected to the output of the reference divider section. The main and auxiliary
synthesizer sections can individually select a reference postscaler division of 1, 2, 4, or 8 by programming fields
SM and SA, respectively (see Figure 24).
Divide by NR
÷ 2
SM = “11”
SM = “10”
SM = “01”
SM = “00”
SA = “11”
SA = “10”
SA = “01”
SA = “00”
MAIN SELECT
AUXILIARY SELECT
Main Phase
Detector
Auxiliary
Phase Detector
Reference Input
Figure 24. Reference Divider
phase detectors
The main and auxiliary synthesizer sections (see Figure 25) incorporate dual D-type flip-flop phase-frequency
detectors (PFD). A PFD has gain with a phase error over a range of
±2π and exhibits an infinite pull-in range.
Dead-band compensation about zero-phase error is provided by forcing the sourcing and sinking charge pumps
to have a minimum on-time of 1/fRef when the loop is operating in a locked condition.
The phase detectors can be programmed for polarity sense. Normally, external system VCOs have a positive
slope control-voltage frequency characteristic. Some VCOs have a negative slope characteristic. The TRF2050
main and auxiliary phase detectors can be programmed for use with positive or negative slope VCOs using the
MCP and ACP fields, respectively, in the B-Word (EPM mode).
For positive slope VCOs: MCP = ACP = 0
For negative slope VCOs: MCP = ACP = 1
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