參數(shù)資料
型號: TRF2056PWR
廠商: TEXAS INSTRUMENTS INC
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO20
封裝: PLASTIC, SOP-20
文件頁數(shù): 1/24頁
文件大?。?/td> 327K
代理商: TRF2056PWR
TRF2056
LOW VOLTAGE 1.2GHz FRACTIONALN/INTEGERN SYNTHESIZER
SLWS111– NOVEMBER 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 1.2-GHz Operation
D Two Operating Modes:
– Philips SA7025 Emulation Mode
Terminal-for-Terminal and Programming
Compatible
– Extended Performance Mode (EPM)
D Dual RF-IF Phase-Locked Loops
D Fractional-N or Integer-N Operation
D Programmable EPM Fractional
Modulus of 1–16
D Normal, Speed-Up, and Fractional
Compensation Charge Pumps
D Low-Power Consumption
description
The TRF2056 device is a low-voltage, low-power consumption 1.2-GHz fractional-N/integer-N frequency
synthesizer component for wireless applications. Fractional-N division and an integral speed-up charge pump
achieve rapid channel switching. Two operating modes are available: 1) SA7025 emulation mode in which the
device emulates the Philips SA7025 fractional-N synthesizer and 2) extended performance mode (EPM), which
provides additional features, including fractional accumulator modulos from 1 to 16 (compared to only 5 or 8
for the SA7025 synthesizer).
The TRF2056 device provides external loop filters and all functions necessary for voltage-controlled oscillator
(VCO) control in a dual phase-locked loop (PLL) frequency synthesizer system. A main channel is provided for
radio frequency (RF) channels and an auxiliary channel for intermediate frequency (IF) channels. The
current-output charge pumps directly drive passive resistance-capacitance (RC) filter networks to generate
VCO control voltages. Rapid main-channel frequency switching is achieved with a charge pump arrangement
that increases the current drive and alters the loop-filter frequency response during the speed-up mode portion
of the switching interval.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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CLOCK
DATA
STROBE
VSS
RFIN
VCCP
REFIN
RA
AUXIN
VDD
TSETUP
LOCK/TEST
RF
RN
VDDA
PHP
PHI
VSSA
PHA
PW PACKAGE
(TOP VIEW)
Copyright
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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