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參數(shù)資料
| 型號(hào)： | TPS59116RGER |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, PQCC24 |
| 封裝： | 4 X 4 MM, GREEN, PLASTIC, VQFN-24 |
| 文件頁數(shù)： | 5/36頁 |
| 文件大?。?/td> | 827K |
| 代理商： | TPS59116RGER |
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V
TRIP (mV) + RTRIP (kW)
10 (mA)
I
OCP +
V
TRIP
R
DS(on)
)
I
RIPPLE
2
+
V
TRIP
R
DS(on)
)
1
2
L
f
V
IN * VOUT
V
OUT
V
IN
TI Information — Selective Disclosure
www.ti.com
SLUSA57 – NOVEMBER 2010
Pre-Biased Start-up
The TPS59116 allows pre-biased start-up of the VDDQ and VTT outputs without causing any undershoot or
ringing in all three discharge modes. The high-side and low-side MOSFETs are kept in the turned-off condition till
the internal soft-start reference increases beyond the feedback voltage at the VDDQSNS pin. The soft-start
operation after this point is the same as the regular startup from a 0 V output.
If the TPS59116 is programmed to operate in no-discharge mode, the VDDQ and VTT outputs do not discharge
any pre-bias voltage, but in non-tracking discharge mode there exist a slow discharge from both VDDQ as well
as VTT outputs. If programmed to operate in tracking discharge mode, the VTT pin has a low impedance path
that forces the voltage at VTT to half the voltage at VDDQ. Normally this creates a low-impedance pull-down
from VTT to GND, if VDDQ is at 0 V.
VDDQ and VTT Discharge Control
TPS59116 discharges VDDQ, VTTREF and VTT outputs during S3 and S5 are both low. There are two different
discharge modes. The discharge mode can be set by connecting MODE pin as shown in Table 3.
Table 3. Discharge Selection
MODE
DISCHARGE MODE
V5IN
No discharge
VDDQ
Tracking discharge
GND
Non-tracking discharge
When in tracking-discharge mode, TPS59116 discharges outputs through the internal VTT regulator transistors
and VTT output tracks half of VDDQ voltage during this discharge. Note that VDDQ discharge current flows via
VLDOIN to LDOGND thus VLDOIN must be connected to VDDQ output in this mode. The internal LDO can
handle up to 3 A and discharge quickly. After VDDQ is discharged down to 0.2 V, the internal LDO is turned off
and the operation mode is changed to the non-tracking-discharge mode.
When in non-tracking-discharge mode, TPS59116 discharges outputs using internal MOSFETs which are
connected to VDDQSNS and VTT. The current capability of these MOSFETs are limited to discharge slowly.
Note that VDDQ discharge current flows from VDDQSNS to PGND in this mode. In case of no discharge mode,
TPS59116 does not discharge output charge at all.
Current Protection for VDDQ
The SMPS has cycle-by-cycle overcurrent limiting control. The inductor current is monitored during the OFF state
and the controller keeps the OFF state during the inductor current is larger than the overcurrent trip level. The
trip level and current sense scheme are determined by CS pin connection (see Current Sensing Scheme
section). For resistor sensing scheme, the trip level, VTRIP, is fixed value of 60 mV.
For RDS(on) sensing scheme, CS terminal sinks 10 mA and the trip level is set to the voltage across this RTRIP
resistor.
(4)
As the comparison is done during the OFF state, VTRIP sets valley level of the inductor current. Thus, the load
(5)
In an overcurrent condition, the current to the load exceeds the current to the output capacitor thus the output
voltage tends to fall down. If the output voltage becomes less than Powergood level, the VTRIP is cut into half and
the output voltage tends to be even lower. Eventually, it crosses the undervoltage protection threshold and
shutdown.
Copyright 2010, Texas Instruments Incorporated
13
Product Folder Link(s): TPS59116
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