參數(shù)資料
型號: TPS59116RGER
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, PQCC24
封裝: 4 X 4 MM, GREEN, PLASTIC, VQFN-24
文件頁數(shù): 10/36頁
文件大?。?/td> 827K
代理商: TPS59116RGER
ESR +
V
OUT
0.015
I
RIPPLE
0.75
[
VOUT
I
OUT(max)
60 [mW]
W
DSRC + VVLDOIN * VVTT
I
VTT
W
DSNK + VVTT
I
VTT
W
PKG +
T
J(max) * TA(max)
q
JA
TI Information — Selective Disclosure
SLUSA57 – NOVEMBER 2010
www.ti.com
The external components selection is much more simple in D-CAP mode.
1. Choose inductor. This section is the same as the current mode. Please refer to the instructions in the
Current Mode Operation section.
2. Choose output capacitor(s). Organic semiconductor capacitor(s) or specialty polymer capacitor(s) are
recommended. Determine an ESR to meet the required ripple voltage. A quick approximation is shown in
(25)
Thermal Design
Primary power dissipation of the TPS59116 is generated from the VTT regulator. The VTT current flow in both
source and sink directions generates power dissipation from the device. In the source phase, the potential
difference between VLDOIN and VTT times VTT current becomes the power dissipation, WDSRC.
(26)
In this case, if VLDOIN is connected to an alternative power supply lower than VDDQ voltage, power loss can be
decreased.
For the sink phase, VTT voltage is applied across the internal LDO regulator, and the power dissipation, WDSNK,
is calculated by Equation 27:
(27)
Because this device does not sink AND source the current at the same time and IVTT varies rapidly with time, the
actual power dissipation that must be considered for thermal design is an average of WDSNK. Another power
consumption is the current used for internal control circuitry from V5IN supply and VLDOIN supply. V5IN
supports both the internal circuit and external MOSFETs drive current. The former current is in the VLDOIN
supply can be estimated as 1.5 mA or less at normal operational conditions.
These powers need to be effectively dissipated from the package. Maximum power dissipation allowed to the
package is calculated by Equation 28,
where
(28)
TJ(max) is 125°C
TA(max) is the maximum ambient temperature in the system
qJA is the thermal resistance from the silicon junction to the ambient
18
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS59116
相關(guān)PDF資料
PDF描述
TRU050-GACFA17.920-8.960 PHASE LOCKED LOOP, CDSO16
TRU050-GACFA41.2416-20.6208 PHASE LOCKED LOOP, CDSO16
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