
SLDS171 – NOVEMBER 2009
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Table 13. Profile of Calibration Write Data Frames (Bank Addressing Mode)
DATA NAME
FRAME NO.
B7 (MSB)
B6
B5
B4
B3
B2
B1
B0 (LSB)
Data (Bank Address)
3
PSNID(1)
PSNID(0)
0
data 5bit
3
SENID(43)
SENID(42)
SENID(41)
SENID(40)
SENID(39)
4
SENID(38)
SENID(37)
SENID(36)
SENID(35)
SENID(34)
5
SENID(33)
SENID(32)
SENID(31)
SENID(30)
SENID(29)
6
SENID(28)
SENID(27)
SENID(26)
SENID(25)
SENID(24)
Sensor ID (0)
7
SENID(23)
SENID(22)
SENID(21)
SENID(20)
SENID(19)
PSNID(1)
PSNID(0)
0
8
SENID(18)
SENID(17)
SENID(16)
SENID(15)
SENID(14)
9
SENID(13)
SENID(12)
SENID(11)
SENID(10)
SENID(9)
10
SENID(8)
SENID(7)
SENID(6)
SENID(5)
SENID(4)
11
SENID(3)
SENID(2)
SENID(1)
SENID(0)
NU
PSN ID(0)
12
PSNID(1)
PSNID(0)
NU
OP threshold (1)
3
TRHS(3)
TRHS(2)
TRHS(1)
TRHS(0)
NU
OP timer (1)
4
TRDELAY(1)
TRDELAY(0)
NU
OP gain (1)
5
TRHSGAIN(2)
TRHSGAIN(1)
TRHSGAIN(0)
NU
Baud rate (2)
3
CONF BPS(3)
CONF BPS(2)
CONF BPS(1)
CONF BPS(0)
NU
3
TRV OSC(16)
TRV OSC(15)
TRV OSC(14)
TRV OSC(13)
TRV OSC(12)
Input coarse offset (3)
4
TRV OSC(11)
TRV OSC(10)
TRV OSC(9)
TRV OSC(8)
NU
5
TRVOSF(7)
TRVOSF(6)
TRVOSF(5)
TRVOSF(4)
TRVOSF(3)
Input fine offset (3)
6
TRVOSF(2)
TRVOSF(1)
TRVOSF(0)
NU
7
TRTC VOS1(6)
TRTC VOS1(5)
TRTC VOS1(4)
TRTC VOS1(3)
TRTC VOS1(2)
Input offset first order
temperature coefficient (3)
8
TRTC VOS1(1)
TRTC VOS1(0)
NU
9
TRTC VOS2(6)
TRTC VOS2(5)
TRTC VOS2(4)
TRTC VOS2(3)
TRTC VOS2(2)
Input offset second order
temperature coefficient (3)
10
TRTC VOS2(1)
TRTC VOS2(0)
NU
11
PSNID(1)
PSNID(0)
0
TRGAIN(8)
TRGAIN(7)
TRGAIN(6)
TRGAIN(5)
TRGAIN(4)
Gain adjust (3)
12
TRGAIN(3)
TRGAIN(2)
TRGAIN(1)
TRGAIN(0)
NU
13
TRTC GAIN1(5)
TRTC GAIN1(4)
TRTC GAIN1(3)
TRTC GAIN1(2)
TRTC GAIN1(1)
Gain first order
temperature coefficient (3)
14
TRTC GAIN1(0)
NU
3
TEMP0(11)
TEMP0(10)
TEMP0(9)
TEMP0(8)
TEMP0(7)
Temperature sensor out 1
4
TEMP0(6)
TEMP0(5)
TEMP0(4)
TEMP0(3)
TEMP0(2)
(4)
5
TEMP0(1)
TEMP0(0)
NU
6
TEMP1(11)
TEMP1(10)
TEMP1(9)
TEMP1(8)
TEMP1(7)
Temperature sensor out 2
7
TEMP1(6)
TEMP1(5)
TEMP1(4)
TEMP1(3)
TEMP1(2)
(4)
8
TEMP1(1)
TEMP1(0)
NU
9
TEMP2(11)
TEMP2(10)
TEMP2(9)
TEMP2(8)
TEMP2(7)
Temperature sensor out 3
10
TEMP2(6)
TEMP2(5)
TEMP2(4)
TEMP2(3)
TEMP2(2)
(4)
11
TEMP2(1)
TEMP2(0)
NU
3
0
4
0
DIAG/UART
PSNID(1)
PSNID(0)
0
5
0
Fastdis
6
Stbit
EO
Pdis
0
Table 14. DIAG/UART Register (Bank Address = 8)
ITEM
DESCRIPTION
Parity disable
Pdis
1 = Disable
0 = Enable
Parity even or odd
EO
1 = Odd
0 = Even
Stop bit length
Stbit
1 = 2 bit
0 = 1 bit
Test mode baud rate
Fastdis
1 = Normal
0 = 153 kHz
22
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