參數(shù)資料
型號： TMX32C6411AGLZ
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： FIXED POINT DIGITAL SIGNAL PROCESSOR
中文描述： 定點數(shù)字信號處理器
文件頁數(shù)： 40/119頁
文件大?。?/td> 1742K
代理商： TMX32C6411AGLZ
SPRS196H MARCH 2002 REVISED JULY 2004
40
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
SIGNAL
TYPE
IPD/
IPU
DESCRIPTION
NAME
NO.
HOST-PORT INTERFACE (HPI) or PERIPHERAL COMPONENT INTERCONNECT (PCI) (CONTINUED)
U1
HD14/AD14§
HD13/AD13§
HD12/AD12§
HD11/AD11§
HD10/AD10§
HD9/AD9§
HD8/AD8§
HD7/AD7§
HD6/AD6§
HD5/AD5§
HD4/AD4§
HD3/AD3§
HD2/AD2§
HD1/AD1§
HD0/AD0§
PCBE0§
U3
Host-port data (
I/O/Z
) [default] or PCI data-address bus (
I/O/Z
)
U2
V4
Used for transfer of data, address, and control
resistor
Host-Port bus width (HPI_WIDTH) user-configurable at device reset via a 10-k
pullup/pulldown resistor on the HD5 pin:
V1
As HPI data bus (PCI_EN pin = 0)
V3
V2
HD5 pin = 0: HPI operates as an HPI16.
(HPI bus is 16 bits wide. HD[15:0] pins are used and the remaining HD[31:16] pins are
reserved pins in the high-impedance state.)
W2
I/O/Z
W4
Y1
HD5 pin = 1: HPI operates as an HPI32.
(HPI bus is 32 bits wide. All HD[31:0] pins are used for host-port operations.)
Y3
Y2
Y4
As PCI data-address bus (PCI_EN pin = 1)
Used for transfer of data and address
AA1
AA3
W3
I/O/Z
PCI command/byte enable 0 (
I/O/Z
). When PCI is disabled (PCI_EN = 0), this pin is tied-off.
XSP_CS
AD1
O
IPD
PCI serial interface chip select (
O
). When PCI is disabled (PCI_EN = 0), this pin is tied-off.
XSP_CLK
AC2
I/O/Z
IPD
This pin has no function at default [default] or when PCI is enabled (PCI_EN = 1), this pin is the
PCI serial interface clock (
O
).
XSP_DI
AB3
I
IPU
This pin has no function at default [default] or when PCI is enabled (PCI_EN = 1), this pin is the
PCI serial interface data in (
I
). In PCI mode, this pin is connected to the output data pin of the
serial PROM.
XSP_DO
AA2
O/Z
IPU
This pin has no function at default [default] or when PCI is enabled (PCI_EN = 1), this pin is the
PCI serial interface data out (
O
). In PCI mode, this pin is connected to the input data pin of the
serial PROM.
GP15/PRST§
GP14/PCLK§
GP13/PINTA§
GP12/PGNT§
GP11/PREQ§
GP10/PCBE3§
GP9/PIDSEL§
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k
IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used, unless otherwise noted.)
§These pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet.
G3
General-purpose input/output (GPIO) 15 pin (
I/O/Z
) or PCI reset (
I
). No function at default.
GPIO 14 pin (
I/O/Z
) or PCI clock (
I
). No function at default.
GPIO 13 pin (
I/O/Z
) or PCI interrupt A (
O/Z
). No function at default.
GPIO 12 pin (
I/O/Z
) or PCI bus grant (
I
). No function at default.
GPIO 11 pin (
I/O/Z
) or PCI bus request (
O/Z
). No function at default.
GPIO 10 pin (
I/O/Z
) or PCI command/byte enable 3 (
I/O/Z
). No function at default.
GPIO 9 pin (
I/O/Z
) or PCI initialization device select (
I
). No function at default.
F2
G4
J3
I/O/Z
F1
L2
M3
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