- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383960 > TMX32C6411AGLZ (Texas Instruments, Inc.) FIXED POINT DIGITAL SIGNAL PROCESSOR PDF資料下載
參數(shù)資料
| 型號： | TMX32C6411AGLZ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | FIXED POINT DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 38/119頁 |
| 文件大?。?/td> | 1742K |
| 代理商： | TMX32C6411AGLZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁當前第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁
SPRS196H MARCH 2002 REVISED JULY 2004
38
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
SIGNAL
TYPE
IPD/
IPU
DESCRIPTION
NAME
NO.
DEVICE CONFIGURATION
LEND
E16
I/O/Z
IPU
Device Endian mode
LEND:
0
1
–
Big Endian
Little Endian (default mode)
HD5/AD5§
Y1
I/O/Z
Host-Port bus width (HPI_WIDTH) user-configurable at device reset via a 10-k
resistor
pullup/pulldown resistor on the HD5 pin:
HD5 pin = 0: HPI operates as an HPI16.
(HPI bus is 16 bits wide. HD[15:0] pins are used and the remaining HD[31:16] pins are
reserved pins in the high-impedance state.)
HD5 pin = 1: HPI operates as an HPI32.
(HPI bus is 32 bits wide. All HD[31:0] pins are used for host-port operations.)
PCI_EN
AA4
I
IPD
PCI enable pin. This pin controls the selection (enable/disable) of the HPI and GP[15:9], or
PCI peripherals. For more details, see the Device Configurations section of this data sheet.
EEAI
B17
I/O/Z
IPD
PCI EEPROM Auto-Initialization (EEAI) via external EEPROM
If
the PCI peripheral is disabled (PCI_EN pin = 0), this pin must
not
be pulled up.
EEAI: 0
PCI auto-initialization through EEPROM is disabled (default).
1
PCI auto-initialization through EEPROM is enabled.
BOOTMODE1
D18
I/O/Z
IPU
Boot mode. Default is reserved. External pullup and/or pulldown resistors must be used to
select a valid bootmode configuration.
BOOTMODE[1:0]:
00 –
01
10
11
No boot
HPI boot
Reserved
EMIF 8-bit ROM boot with default timings (default mode)
BOOTMODE0
C18
IPD
ECLKIN_SEL1
B18
I/O/Z
IPD
EMIF clock mode select
ECLKIN_SEL[1:0]: 00 –
ECLKIN (default mode)
CPU/4 Clock Rate
CPU/6 Clock Rate
Reserved
ECLKIN_SEL0
A18
01
10
11
RESETS, INTERRUPTS, AND GENERAL-PURPOSE INPUT/OUTPUTS
RESET
AC7
I
Device reset
NMI
B4
I
IPD
Nonmaskable interrupt, edge-driven (rising edge)
GP7/EXT_INT7
AF4
General-purpose input/output (GPIO) pins (
I/O/Z
) or external interrupts (
input only
). The
default after reset setting is GPIO enabled as input-only.
When these pins function as External Interrupts [by selecting the corresponding interrupt
enable register bit (IER.[7:4])], they are edge-driven and the polarity can be independently
selected via the External Interrupt Polarity Register bits (EXTPOL.[3:0]).
General-purpose input/output (GPIO) 15 pin (
I/O/Z
) or PCI reset (
I
). No function at default.
GPIO 14 pin (
I/O/Z
) or PCI clock (
I
). No function at default.
GPIO 13 pin (
I/O/Z
) or PCI interrupt A (
O/Z
). No function at default.
GPIO 12 pin (
I/O/Z
) or PCI bus grant (
I
). No function at default.
GPIO 11 pin (
I/O/Z
) or PCI bus request (
O/Z
). No function at default.
GPIO 10 pin (
I/O/Z
) or PCI command/byte enable 3 (
I/O/Z
). No function at default.
GPIO 9 pin (
I/O/Z
) or PCI initialization device select (
I
). No function at default.
GPIO 3 pin (
I/O/Z
).
GP6/EXT_INT6
AD5
I/O/Z
IPU
GP5/EXT_INT5
AE5
GP4/EXT_INT4
GP15/PRST§
GP14/PCLK§
GP13/PINTA§
GP12/PGNT§
GP11/PREQ§
GP10/PCBE3§
GP9/PIDSEL§
AF5
G3
F2
G4
J3
I/O/Z
F1
L2
M3
GP3
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k
IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used, unless otherwise noted.)
§These pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet.
AC6
IPD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMP32C6411AZLZ | FIXED POINT DIGITAL SIGNAL PROCESSOR |
| TMP320C6411AZLZ | FIXED POINT DIGITAL SIGNAL PROCESSOR |
| TMX32C6411AZLZ | ER 5C 2#6 3#4 SKT PLUG |
| TMP320C6411ZLZ | FIXED POINT DIGITAL SIGNAL PROCESSOR |
| TMX32C6411ZLZ | FIXED POINT DIGITAL SIGNAL PROCESSOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMX32C6414EGLZ6E3 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMX32C6415EGLZ5E0 | 制造商:Rochester Electronics LLC 功能描述:LAPLACE, REV. 2.0, 500 MHZ, 100 MHZ EMIF - Bulk |
| TMX32C6416EGLZ5E0 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TMX32TCI6482BZTZA2 | 制造商:Texas Instruments 功能描述: |
| TMX32TCI6616BXCYPA | 制造商:Texas Instruments 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。