www.ti.com
TMS320TCI6482
Communications Infrastructure Digital Signal Processor
SPRS246F–APRIL 2005–REVISED MAY 2007
Table 8-112. RapidIO Control Registers (continued)
HEX ADDRESS RANGE
02D0 0044
02D0 0048
02D0 004C
02D0 0050
02D0 0054
02D0 0058
02D0 005C
02D0 0060
02D0 0064
02D0 0068
02D0 006C
02D0 0070
02D0 0074
02D0 0078
02D0 007C
02D0 0080
02D0 0084
02D0 0088 - 02D0 008C
02D0 0090
02D0 0094
02D0 0098
02D0 009C
02D0 00A0
02D0 00A4
02D0 00A8
02D0 00AC
02D0 00B0 - 02D0 00FC
02D0 0100
02D0 0104
02D0 0108
02D0 010C
02D0 0110
02D0 0114
02D0 0118
02D0 011C
02D0 0120
02D0 0124
02D0 0128
02D0 012C
02D0 0130 - 02D0 01FC
02D0 0200
02D0 0204
02D0 0208
02D0 020C
02D0 0210
02D0 0214
02D0 0218
ACRONYM
RIO_BLK1_EN_STAT
RIO_BLK2_EN
RIO_BLK2_EN_STAT
RIO_BLK3_EN
RIO_BLK3_EN_STAT
RIO_BLK4_EN
RIO_BLK4_EN_STAT
RIO_BLK5_EN
RIO_BLK5_EN_STAT
RIO_BLK6_EN
RIO_BLK6_EN_STAT
RIO_BLK7_EN
RIO_BLK7_EN_STAT
RIO_BLK8_EN
RIO_BLK8_EN_STAT
RIO_DEVICEID_REG1
RIO_DEVICEID_REG2
-
RIO_PF_16B_CNTL0
RIO_PF_8B_CNTL0
RIO_PF_16B_CNTL1
RIO_PF_8B_CNTL1
RIO_PF_16B_CNTL2
RIO_PF_8B_CNTL2
RIO_PF_16B_CNTL3
RIO_PF_8B_CNTL3
-
RIO_SERDES_CFGRX0_CNTL
RIO_SERDES_CFGRX1_CNTL
RIO_SERDES_CFGRX2_CNTL
RIO_SERDES_CFGRX3_CNTL
RIO_SERDES_CFGTX0_CNTL
RIO_SERDES_CFGTX1_CNTL
RIO_SERDES_CFGTX2_CNTL
RIO_SERDES_CFGTX3_CNTL
RIO_SERDES_CFG0_CNTL
RIO_SERDES_CFG1_CNTL
RIO_SERDES_CFG2_CNTL
RIO_SERDES_CFG3_CNTL
-
RIO_DOORBELL0_ICSR
-
RIO_DOORBELL0_ICCR
-
RIO_DOORBELL1_ICSR
-
RIO_DOORBELL1_ICCR
REGISTER NAME
Block Enable Status 1
Block Enable 2
Block Enable Status 2
Block Enable 3
Block Enable Status 3
Block Enable 4
Block Enable Status 4
Block Enable 5
Block Enable Status 5
Block Enable 6
Block Enable Status 6
Block Enable 7
Block Enable Status 7
Block Enable 8
Block Enable Status 8
RapidIO DEVICEID1 Register
RapidIO DEVICEID2 Register
Reserved
Packet Forwarding Register 0 for 16-bit Device IDs
Packet Forwarding Register 0 for 8-bit Device IDs
Packet Forwarding Register 1 for 16-bit Device IDs
Packet Forwarding Register 1 for 8-bit Device IDs
Packet Forwarding Register 2 for 16-bit Device IDs
Packet Forwarding Register 2 for 8-bit Device IDs
Packet Forwarding Register 3 for 16-bit Device IDs
Packet Forwarding Register 3 for 8-bit Device IDs
Reserved
SERDES Receive Channel Configuration Register 0
SERDES Receive Channel Configuration Register 1
SERDES Receive Channel Configuration Register 2
SERDES Receive Channel Configuration Register 3
SERDES Transmit Channel Configuration Register 0
SERDES Transmit Channel Configuration Register 1
SERDES Transmit Channel Configuration Register 2
SERDES Transmit Channel Configuration Register 3
SERDES Macro Configuration Register 0
SERDES Macro Configuration Register 1
SERDES Macro Configuration Register 2
SERDES Macro Configuration Register 3
Reserved
DOORBELL Interrupt Condition Status Register 0
Reserved
DOORBELL Interrupt Condition Clear Register 0
Reserved
DOORBELL Interrupt Condition Status Register 1
Reserved
DOORBELL Interrupt Condition Clear Register 1
C64x+ Peripheral Information and Electrical Specifications
232
Submit Documentation Feedback