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參數(shù)資料
| 型號： | TMX320C6411AZLZ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | FIXED POINT DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 68/119頁 |
| 文件大小： | 1742K |
| 代理商： | TMX320C6411AZLZ |
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SPRS196H MARCH 2002 REVISED JULY 2004
68
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
electrical characteristics over recommended ranges of supply voltage and operating case
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
DVDD
= MIN,
IOHP = 0.5 mA,
DVDD
= MIN,
IOLP = 1.5 mA,
VI
= VSS to DVDD no opposing internal
resistor
VI
= VSS to DVDD opposing internal
pullup resistor
VI
= VSS to DVDD opposing internal
pulldown resistor
0 < VIP
< DVDD,
EMIF, CLKOUT4, CLKOUT6, EMUx
MIN
TYP
MAX
UNIT
VOH
VOHP
VOL
VOLP
High-level output voltage (except PCI)
IOH = MAX
DVDD = 3.3 V
IOL = MAX
DVDD = 3.3 V
2.4
V
High-level output voltage (PCI)
0.9DVDD
V
Low-level output voltage (except PCI)
0.4
V
Low-level output voltage (PCI)
0.1DVDD
V
±
10
uA
II
Input current (except PCI)
50
100
150
uA
150
100
50
uA
IIP
Input leakage current (PCI)§
DVDD = 3.3 V
±
10
16
uA
mA
IOH
High-level output current
Timer, TDO, GPIO
(Excluding GP[15:9, 2, 1]), McBSP
8
mA
PCI/HPI
0.5§
mA
EMIF, CLKOUT4, CLKOUT6, EMUx
16
mA
IOL
Low-level output current
Timer, TDO, GPIO
(Excluding GP[15:9, 2, 1]), McBSP
8
mA
PCI/HPI
VO
= DVDD or 0 V
CVDD
= 1.2 V, CPU clock = 300 MHz
DVDD
= 3.3 V, CPU clock = 300 MHz
1.5
mA
IOZ
ICDD
IDDD
Ci
Co
For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.
Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor.
§PCI input leakage currents include Hi-Z output leakage for all bidirectional buffers with 3-state outputs.
These rated numbers are from the PCI specification version 2.3. The DC specification and AC specification are defined in Tables 4-3 and 4-4,
respectively.
#Measured with average activity (50% high/50% low power). The actual current draw is highly application-dependent. For more details on core
and I/O activity, refer to the
TMS320C6411 Power Consumption Summary
application report (literature number SPRA373).
Off-state output current
Core supply current#
I/O supply current#
±
10
uA
550
mA
125
mA
Input capacitance
10
pF
Output capacitance
10
pF
recommended clock and control signal transition behavior
All clocks and control signals
must
transition between V
IH
and V
IL
(or between V
IL
and V
IH
) in a monotonic
manner.
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