
SPRS094I APRIL 1999 REVISED SEPTEMBER 2003
11
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
pin functions (continued)
Table 2. LF240x Pin List and Package Options
(Continued)
PIN NAME
LF2407
LF2406
LF2402
DESCRIPTION
ANALOG-TO-DIGITAL CONVERTER (ADC)
ADCIN00
112
79
18
Analog input #0 to the ADC
ADCIN01
110
77
17
Analog input #1 to the ADC
ADCIN02
107
74
16
Analog input #2 to the ADC
ADCIN03
105
72
15
Analog input #3 to the ADC
ADCIN04
103
70
14
Analog input #4 to the ADC
ADCIN05
102
69
13
Analog input #5 to the ADC
ADCIN06
100
67
12
Analog input #6 to the ADC
ADCIN07
99
66
11
Analog input #7 to the ADC
ADCIN08
113
80
Analog input #8 to the ADC
ADCIN09
111
78
Analog input #9 to the ADC
ADCIN10
109
76
Analog input #10 to the ADC
ADCIN11
108
75
Analog input #11 to the ADC
ADCIN12
106
73
Analog input #12 to the ADC
ADCIN13
104
71
Analog input #13 to the ADC
ADCIN14
101
68
Analog input #14 to the ADC
ADCIN15
98
65
Analog input #15 to the ADC
VREFHI
VREFLO
VCCA
VSSA
CONTROLLER AREA NETWORK (CAN), SERIAL COMMUNICATIONS INTERFACE (SCI), SERIAL PERIPHERAL INTERFACE (SPI)
CANRX
70
49
IOPC7
70
49
63
115
82
20
ADC analog high-voltage reference input
114
81
19
ADC analog low-voltage reference input
Analog supply voltage for ADC (3.3 V)§
116
83
21
117
84
22
Analog ground reference for ADC
CANRX/
IOPC7
CAN receive data or GPIO
(
)
↑
CANTX/
IOPC6
CANTX
72
50
CAN transmit data or GPIO
(
↑
)
IOPC6
72
50
64
SCITXD/
IOPA0
25
17
43
SCI asynchronous serial port transmit data or GPIO
(
↑
)
SCIRXD/
IOPA1
26
18
44
SCI asynchronous serial port receive data or or GPIO
(
↑
)
SPICLK/
IOPC4
SPICLK
35
24
SPI clock or GPIO
↑
(
)
IOPC4
35
24
47
SPISIMO/
IOPC2
SPISIMO
30
21
SPI slave in, master out or GPIO
(
↑
)
IOPC2
30
21
45
SPISOMI/
IOPC3
SPISOMI
32
22
SPI slave out, master in or GPIO
(
↑
)
IOPC3
32
22
46
SPISTE/
IOPC5
SPISTE
IOPC5
33
33
23
23
SPI slave transmit-enable (optional) or GPIO
(
↑
)
Bold, italicized pin names
indicate pin function after reset.
GPIO General-purpose input/output pin. All GPIOs come up as input after reset.
§It is highly recommended that VCCA be isolated from the digital supply voltage (and VSSA from digital ground) to maintain the specified accuracy
and improve the noise immunity of the ADC.
Only when all of the following conditions are met: EMU1/OFF is low, TRST is low, and EMU0 is high
#No power supply pin (VDD, VDDO, VSS, or VSSO) should be left unconnected. All power supply pins must be connected appropriately for proper
device operation.
LEGEND:
↑
Internal pullup
↓
Internal pulldown
(Typical active pullup/pulldown value is
±
16
μ
A.)