參數(shù)資料
型號: TMS320LC2402APG
廠商: Texas Instruments, Inc.
英文描述: Foot Grounder; Features:1 megohm resistor; elastic strap for comfort; elastic velcro; D-ring adjustability; 3 layer sole for durability; 18" conductive ribbon RoHS Compliant: NA
中文描述: DSP控制器
文件頁數(shù): 85/133頁
文件大?。?/td> 1672K
代理商: TMS320LC2402APG
SPRS145J JULY 2000 REVISED NOVEMER 2004
85
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
LPM2 wakeup timing
switching characteristics over recommended operating conditions (see Figure 33)
PARAMETER
MIN
MAX
UNIT
ns
td(PDP-PWM)HZ
Delay time, PDPINTA low to PWM
high-impedance state
if bit 6 of SCSR2 = 0
(6 + 1)tc(CO) + 12
(12+ 1)tc(CO) + 12
if bit 6 of SCSR2 = 1
ns
td(INT)
Delay time, INT low/high to interrupt-vector
fetch
10tc(CO) + tw(PDPWAKE)
ns
Includes i/p qualifier cycles plus synchronization plus propagation delay
timing requirements (see Figure 33)
MIN
MAX
UNIT
Pulse duration, PDPINTA input low
if bit 6 of SCSR2 = 0
6tc(CO)
12tc(CO)
ns
tw(PDPWAKE)
if bit 6 of SCSR2 = 1
tp
PLL lock-up time
4096tc(CI)
cycles
This is different from 240x devices.
PWM
PDPINTx
CLKOUT
tw(PDPWAKE)
td(PDP-PWM)HZ
CPU Status
Interrupt Vector§ or
Next Instruction
td(INT)
XTAL1
Oscillator Disabled
CLKIN
tp
tOSC
CPU IDLE State (LPM2)
tOSC is the oscillator start-up time.
CLKOUT frequency after LPM2 wakeup will be the same as that upon entering LPM2 (x4 shown as an example).
§PDPINTx interrupt vector, if PDPINTx interrupt is enabled.
If PDPINTx interrupt is disabled.
Figure 33. LPM2 Wakeup Using PDPINTx
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