參數(shù)資料
型號: TMS320LC2402APG
廠商: Texas Instruments, Inc.
英文描述: Foot Grounder; Features:1 megohm resistor; elastic strap for comfort; elastic velcro; D-ring adjustability; 3 layer sole for durability; 18" conductive ribbon RoHS Compliant: NA
中文描述: DSP控制器
文件頁數(shù): 29/133頁
文件大小: 1672K
代理商: TMS320LC2402APG
SPRS145J JULY 2000 REVISED NOVEMBER 2004
29
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
peripheral memory map of the 2407A/2406A
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External
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Digital I/O Control Registers
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External-Interrupt Registers
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SCI
Illegal
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System Configuration and
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Peripheral Frame 1 (PF1)
Reserved
Reserved
èèèèèèèèè
èèèèèèèèè
70C070FF
General-Purpose
Timer Registers
Compare, PWM, and
Flag Registers
Event Manager EVB
Deadband Registers
Capture and QEP Registers
Interrupt Mask, Vector, and
75007508
75117519
75207529
752C7531
7532753F
7432743F
742C7431
74207429
74117419
74007408
Illegal
Interrupt Mask, Vector and
Capture and QEP Registers
Deadband Registers
Compare, PWM, and
Timer Registers
General-Purpose
Event Manager EVA
710F71FF
7100710E
70A070BF
7090709F
7080708F
7070707F
7060706F
7050705F
7040704F
7030703F
7020702F
7010701F
7000700F
SPI
Watchdog Timer Registers
Control Registers
Hex
0000
Hex
0000
005F
0007
0006
0005
0004
0003
and Reserved
Emulation Registers
Interrupt Flag Register
Interrupt-Mask Register
FFFF
77F0
77F3
77F4
77FF
7800
77EF
7540
753F
7500
74FF
7440
743F
7400
73FF
7000
6FFF
1000
07FF
0800
0FFF
0400
03FF
0300
02FF
0200
01FF
0080
007F
0060
005F
Peripheral Frame 2 (PF2)
On-Chip DARAM B1
On-Chip DARAM B0
Reserved
On-Chip DARAM B2
and Reserved
Memory-Mapped Registers
“Illegal” indicates that access to
these addresses causes a
nonmaskable interrupt (NMI).
èèèè
èèèè
èèèè
Reserved
“Reserved” indicates addresses that
are reserved for test.
Available in LF2407A only
èèèèèèèèè
èèèèèèèèè
Illegal
Illegal
Illegal
0100
00FF
Reserved
èèèèèèèèè
èèèèèèèèè
SARAM (2K)
0500
04FF
723073FF
7200722F
Illegal
Reserved
Code Security Passwords
7FFF
8000
Reserved
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