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參數(shù)資料
| 型號： | TMS320F241PGQ |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 16-Bit Digital Signal Processor |
| 中文描述： | 16位數(shù)字信號處理器 |
| 文件頁數(shù)： | 63/116頁 |
| 文件大?。?/td> | 1485K |
| 代理商： | TMS320F241PGQ |
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TMS320F243, TMS320F241
DSP CONTROLLERS
SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999
63
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
addressing modes (continued)
There are seven types of indirect addressing: autoincrement or autodecrement, postindexing by adding or
subtracting the contents of AR0, single-indirect addressing with no increment or decrement, and bit-reversed
addressing [used in Fast Fourier Transforms (FFTs)] with increment or decrement. All operations are performed
on the current auxiliary register in the same cycle as the original instruction, following which the current auxiliary
register and ARP can be modified.
In immediate addressing, the actual operand data is provided in a portion of the instruction word or words. There
are two types of immediate addressing: long and short. In short-immediate addressing, the data is contained
in a portion of the bits in a single-word instruction. In long-immediate addressing, the data is contained in the
second word of a two-word instruction. The immediate-addressing mode is useful for data that does not need
to be stored or used more than once during the course of program execution (for example, initialization values
or constants).
The register-addressing mode uses operands in CPU registers either explicitly, such as with a direct reference
to a specific register, or implicitly, with instructions that intrinsically reference certain registers. In either case,
operand reference is simplified because 16-bit values can be used without specifying a full 16-bit operand
address or immediate value.
repeat feature
The repeat function can be used with instructions (as defined in Table 21) such as multiply/accumulates (MAC
and MACD), block moves (BLDD and BLPD), I/O transfers (IN/OUT), and table read/writes (TBLR/TBLW).
These instructions, although normally multicycle, are pipelined when the repeat feature is used, and they
effectively become single-cycle instructions. For example, the table-read instruction can take three or more
cycles to execute, but when the instruction is repeated, a table location can be read every cycle.
The repeat counter (RPTC) is loaded with the addressed data memory location if direct or indirect addressing
is used, and with an 8-bit immediate value if short-immediate addressing is used. The internal RPTC register
is loaded by the RPT instruction. This results in a maximum of N + 1 executions of a given instruction. RPTC
is cleared by reset. Once a repeat instruction (RPT) is decoded, all interrupts, including NMI (but excluding
reset), are masked until the completion of the repeat loop.
instruction set summary
This section summarizes the operation codes (opcodes) of the instruction set for the ’x24x digital signal
processors. This instruction set is a superset of the ’C1x and ’C2x instruction sets. The instructions are arranged
according to function and are alphabetized by mnemonic within each category. The symbols in Table 20 are
used in the instruction set summary table (Table 21). The TI ’C2xx assembler accepts ’C2x instructions.
The number of words that an instruction occupies in program memory is specified in column 3 of Table 22.
Several instructions specify two values separated by a
slash mark
(/) for the number of words. In these cases,
different forms of the instruction occupy a different number of words. For example, the ADD instruction occupies
one word when the operand is a short-immediate value or two words if the operand is a long-immediate value.
The number of cycles that an instruction requires to execute is also in column 3 of Table 22. All instructions are
assumed to be executed from internal program memory (RAM) and internal data dual-access memory. The
cycle timings are for single-instruction execution, not for repeat mode.
相關(guān)PDF資料 |
PDF描述 |
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| TMS320F243PGEQ | 16-Bit Digital Signal Processor |
| TMS320F243PGES | 16-Bit Digital Signal Processor |
| TMS320C3X | 32-Bit Digital Signal Processor |
| TMS320C4X | Digital Signal Processing Solutions |
| TMS320C6454GTZ7 | Fixed-Point Digital Signal Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMS320F241PGS | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16B 5V fixed point DSP w/ Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320F243PGE | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16B 5V fixed point DSP w/ Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320F243PGEA | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16B 5V fixed point DSP w/ Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320F28015PZA | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 32-Bit DSC w/ 32KB Flash RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320F28015PZA | 制造商:Texas Instruments 功能描述:IC DSP 32-BIT CMOS QFP 100PIN PLAS |
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