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參數(shù)資料
| 型號(hào)： | TMPR3927F |
| 廠商： | Toshiba Corporation |
| 英文描述： | 32 Bit TX39 Family System RISC Microprocessor(32位TX39系列精簡(jiǎn)指令集系統(tǒng)計(jì)算機(jī)微處理器) |
| 中文描述： | 32位TX39家庭系統(tǒng)RISC微處理器（32位TX39系列精簡(jiǎn)指令集系統(tǒng)計(jì)算機(jī)微處理器） |
| 文件頁(yè)數(shù)： | 11/22頁(yè) |
| 文件大?。?/td> | 272K |
| 代理商： | TMPR3927F |
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TAEC_rev4_11-Jan-2000 11/22
TMPR3927F
TENTATIVE
SIO Interface
CTS*[1:0]
I
SIO Clear to Send
Signals are software assigned and shared with PIO/INT and serial debug GSDAO[1]
functions.
Signal is connected to internal pull-up resistor.
RTS*[1:0]
O
SIO Request to Send
Signals are software assigned and shared with PIO/INT and serial debug GPCST[3]
functions.
Signal is connected to internal pull-up resistor.
RXD[1:0]
I
SIO Receive Data
Signals are multiplexed with PIO/INT functions.
Signal is connected to internal pull-up resistor.
TXD[1:0]
O
SIO Transmit Data
Signals are multiplexed with PIO/INT functions.
Signal is connected to internal pull-up resistor.
SCLK
I
External Serial Clock
Signal is connected to internal pull-up resistor.
PIO Interface
PIO[15:0]
I/O
PIO Ports
All PIO signals, except 0, are shared with either DMA, INT, TIMER, Debug, or SIO
functions. PIO[1] is shared with DSF, an SGRAM memory function. PIO[0] is
connected to internal pull-up resistor.
Debug Interface
GDCLK
O
Debug Clock Signal
This is the clock output for the real-time debugging system. The serial monitor bus
and PC trace interface signals all have their timings regulated by this debug clock.
During serial monitor bus operation, this clock is half the frequency of the TX39/H2
core operating clock.
GSDAO[1:0]
O
Serial Data and Address Output/Target PC
These signals function as serial data/address outputs when operating with the serial
monitor bus interface or as debug interrupt input when operating with the PC trace
interface.
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