參數(shù)資料
型號: TMP320F2812ZHHQ
廠商: Texas Instruments, Inc.
英文描述: MICROSCOPE LTD SHOP W/DL RETICLE
中文描述: TMS320R2811,TMS320R2812數(shù)字信號處理器
文件頁數(shù): 98/147頁
文件大?。?/td> 2021K
代理商: TMP320F2812ZHHQ
Electrical Specifications
98
June 2004
SPRS257
t
w(WAKE-INT)
t
d(WAKE-STBY)
t
d(IDLE
XCOH)
32 SYSCLKOUT Cycles
Wake
up
Signal
X1/XCLKIN
XCLKOUT
STANDBY
Normal Execution
STANDBY
Flushing Pipeline
A
B
C
D
E
F
Device
Status
NOTES: A. IDLE instruction is executed to put the device into STANDBY mode.
B. The PLL block responds to the STANDBY signal. SYSCLKOUT is held for approximately 32 cycles before being turned
off. This 32
cycle delay enables the CPU pipe and any other pending operations to flush properly.
C. The device is now in STANDBY mode.
D. The external wake
up signal is driven active (negative edge triggered shown as an example).
E. After a latency period, the STANDBY mode is exited.
F. Normal operation resumes. The device will respond to the interrupt (if enabled).
Figure 6
11. STANDBY Entry and Exit Timing
Table 6
11. HALT Mode Switching Characteristics
PARAMETER
MIN
TYP
MAX
UNIT
t
d(IDLE-XCOH)
t
w(WAKE-XNMI)
t
w(WAKE-XRS)
t
p
Delay time, IDLE instruction executed to XCLKOUT high
32 * t
c(SCO)
2 * t
c(CI)
8 * t
c(CI)
45 * t
c(SCO)
Cycles
Pulse duration, XNMI wakeup signal
Cycles
Pulse duration, XRS wakeup signal
Cycles
PLL lock-up time
131072 * t
c(CI)
Cycles
t
d(wake)
Delay time, PLL lock to program execution resume
Wake-up from SARAM
35*tc(SCO)
Cycles
A
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