參數(shù)資料
型號(hào)： TMC2491AR2C
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： COLOR SIGNAL ENCODER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 32/36頁
文件大?。?/td> 208K
代理商： TMC2491AR2C
PRODUCT SPECIFICATION
TMC2490A/TMC2491A
5
Control Registers
The TMC2490(1)A is initialized and controlled by a set of
registers which determine the operating modes.
An external controller is employed to write and read the
Control Registers through either the 8-bit parallel or 2-line
serial interface port. The parallel port, D7-0, is governed by
pins CS, R/W, and ADR. The serial port is controlled by
SDA and SCL.
Table 1. Control Register Map
Reg
Bit
Mnemonic
Function
TMC2490(1)A Identication Registers (Read only)
00
7-0
PARTID2
Reads back 97h
01
7-0
PARTID1
Reads back 24h
02
7-0
PARTID0
Reads back 90h (91h)
03
7-0
REVID
Silicon revision #
Global Control Register
04
7
MASTER
Master Mode
04
6
NGSEL
NTSC Gain Select
04
5
YCDELAY
Luma to chroma delay
04
4
RAMPEN
Modulated ramp enable
04
3
YCDIS
LUMA, CHROMA disable
04
2
COMPDIS
COMPOSITE disable
04
1-0
FORMAT
Television standard select
Video Output Control Register
05
7
PALN
Select PAL-N Subcarrier
05
6
BURSTF
Burst flag disable
05
5
CHRBW
Chroma bandwidth select
05
4
SYNCDIS
Sync pulse disable
05
3
BURDIS
Color burst disable
05
2
LUMDIS
Luminance disable
05
1
CHRDIS
Chrominance disable
05
0
PEDEN
Pedestal enable
Field ID Register
06
7-6
Reserved
Program LOW
06
5-3
FIELD
Field ID (Read only)
06
2-0
Reserved
Program LOW
Reserved Registers
07-
0D
7-0
Reserved
Program LOW
Notes:
1. For each register listed above, all bits not specified are
reserved and should be set to logic LOW to ensure proper
operation.
General Purpose Port Register
0E
7
PORT7-6
General purpose Inputs
0E
6
PORT5-2
General purpose Outputs
0E
1
BURSTF
Burst Flag Output
0E
0
CSYNC
Composite Sync Output
General Control Register
0F
7
PED21
VBI Pedestal Enable
0F
5
VSEL
Vertical Sync Select
0F
4
CBSEL
CBSEL/PDC Pin Function
0F
3
VBIEN
VBI Pixel Data Enable
0F
1-0
HDSEL
HSYNC Delay
Reserved Registers
10-
1F
7-0
Reserved
May be left unprogrammed
Closed-Caption Insertion Registers
20
7-0
CCD1
First Byte of CC Data
21
7-0
CCD2
Second Byte of CC Data
22
7
CCON
Enable CC Data Packet
22
6
CCRTS
Request To Send Data
22
5
CCPAR
Auto Parity Generation
22
4
CCFLD
CC Field Select
22
3-0
CCLINE
CC Line Select
Reg
Bit
Mnemonic
Function
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