參數(shù)資料
型號(hào): TMC2302A
廠商: Fairchild Semiconductor Corporation
英文描述: Image Manipulation Sequencer
中文描述: 圖像處理序列
文件頁數(shù): 20/36頁
文件大?。?/td> 188K
代理商: TMC2302A
TMC2302A
PRODUCT SPECIFICATION
20
P
The first-order cross terms, dX/dV and dY/dU, generate
source space displacements perpendicular to unit displace-
ments in the target space, thereby causing shearing of the
image. In conjunction with the parallel source terms
described above, they govern rotation, shear, and scaling of
the image.
Although the actions of the higher-order terms become pro-
gressively difficult to describe, all terms behave essentially
as partial differences of various orders, and a little thought
and common sense will generally lead the user to the proper
conclusions. For example, the term dXUU (using the nota-
tion of Table 2) is a horizontal scale factor which increases as
one progresses across each row, causing a quadratic horizon-
tal warp. In fact, all terms of the form d
m
x/du
m
or
d
n
y/dv
n
cause only stretching of the image, never rotation.
Interpolation Coefficient Lookup Table
Addressing
The external coefficient lookup table RAM stores the inter-
polation coefficient values used to calculate the value of the
new pixel. These values are selected by the user, allowing
maximum filtering flexibility. In simple filtering applica-
tions, the source and target pixel addresses map one-to-one,
and only one interpolation coefficient set is required. These
integer addresses are generated for each dimension by the
internal walk counters of each TMC2302A.
However, applications performing a coordinate transforma-
tion will almost always generate non-integer source pixel
addresses; that is, the U (or V) locations will not map to the
X (or Y) addresses exactly, and a fractional source address
components are generated. The user must then expand the
interpolation coefficient lookup table to include spatially-
corrected values, as detemnined by the subpixel resolution of
the system.
The TMC2301 Image Resampling Sequencer allows the user
to trade subpixel resolution against interpolation step size by
obtaining the interpolation coefficient addresses directly
from the fractional part of the source address. The
TMC2302A gives the user 16 different interpolation bit
weighting positions. The complete Interpolation Coefficient
Address for that dimension then consists of both the 8-bit
interpolation walk address KADR
7-0
, weighted to match the
source address binary point by the parameter FOV, and the
fractional portion of the source pixel address SADR
23-0
,
to the desired subpixel resolution. See Table 6.
Internal and External Data Formats
The source address value output by the TMC2302A is a
24-bit two's complement number, with binary point assign-
able by the user anywhere in the 16 lower bits. The Extended
mode appends 12 additional fractional bits for greater output
precision. All internal computations include these 24 plus 12
bits, plus an additional 12 lower bits, for 48-bit precision.
See Table 6.
Intemally, each TMC2302A's source address (X, Y,or Z)
generator computes a 48-bit address through a mode-specific
accumulation of the sixteen 48-bit user-specified resampling
parameters. The 24 most significant bits of the final accumu-
lation emerge via the source address port whereas the
"extend" mode makes the 12 next most-significant bits avail-
able at the target address port. The 12 least significant bits
are truncated internally.
Source Address Bit Weighting and Setting the
Binary Point
When performing nearest-neighbor resampling, the user may
arbitrarily trade source image size against subpixel resolu-
tion merely by adhering to a single binary point position for
all resampling parameters. For example, if the binary point
follows the 16 most significant bits in each resampling
parameter, then it will appear following the source
address’16 most significant bits, leaving 8 (20 in extended
mode) bits of subpixel resolution on SADR
n
.
Since the TMC2302A has no internal limiter, the user should
select the source address weighting appropriately. Moving
the source address connections to the right and reducing the
resampling parameters accordingly, reduces the chance of
arithmetic overflow while increasing arithmetic round-error.
In any filtering or resampling operation performing an inter-
polation walk, the user should set the Field or View (FOV)
parameter according to the desired binary point position
determined above, as follows. To provide 2
24
integral pixel
positions per dimension, with no subpixel resolution, set
FOV = 001 (hex). For 2
23
positions with 1-bit (0,5)
subpixel resolution, FOV = 0010 (hex). Similarly, for 2
9
positions and 15-bit subpixel resolution. FOV = 8000 (hex).
As shown in Table 6, using the parameter FOV the user
effectively “shifts” the bit weight of the coefficient address
word KADR
7-0
to match the established location of his
source address binary point. In each case, the EXTEND
mode provides 12 additional bits of subpixel resolution but
eliminates the separate target or raster address, which must
then be generated elsewhere in the user's system.
相關(guān)PDF資料
PDF描述
TMC2302AH5C Image Manipulation Sequencer
TMC2302AH5C1 Image Manipulation Sequencer
TMC2302AKEC Image Manipulation Sequencer
TMC2302AKEC1 Image Manipulation Sequencer
TMC2330AH5C Coordinate Transformer 16 x 16 Bit, 40 MOPS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMC2302AH5C 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述:
TMC2302AH5C1 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Fairchild Semiconductor Corporation 功能描述:
TMC2302AKEC 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer
TMC2302AKEC1 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Image Manipulation Sequencer
TMC2330A 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Coordinate Transformer 16 x 16 Bit, 40 MOPS