參數(shù)資料
型號: TMC1185
廠商: Fairchild Semiconductor Corporation
英文描述: 10-Bit, 40 Msps Sampling Analog-to-Digital Converter(10位,采樣速率40Msps,A/D轉(zhuǎn)換器)
中文描述: 10位,40 Msps的采樣模擬到數(shù)字轉(zhuǎn)換器(10位,40Msps采樣速率,的A / D轉(zhuǎn)換器)
文件頁數(shù): 7/20頁
文件大?。?/td> 191K
代理商: TMC1185
PRODUCT SPECIFICATION
TMC1185
7
Notes:
1. dBFS refers to dB below Full Scale.
2. Percentage accuracies are referred to the internal A/D Full Scale Range of 4Vp-p.
3. Refer to Timing Diagram footnotes for the f
IN
= 500kHz differential linearity error performance condition.
4. IMD is referred to the larger of the two input signals. If referred to the peak envelope signal (=0dB), the intermodulation
products will be 7dB better.
5. Based on (SINAD -1.76)/6.02.
6. No “rollover” of bits.
Outputs
Logic Family
Logic Coding
Logic Levels
TTL/HCT Compatible CMOS
SOB or BTC
0
Logic Selectable
Logic “LO”,
C
L
= 15pF
Logic “HI”,
C
L
= 15pF
Full
0.4
V
Full
2.5
VDD
V
3-State Enable Time
3-State Disable Time
Power Supply Requirements
Supply Voltage: VDD
Supply Current: IDD
20
2
40
10
ns
ns
Full
Operating
Operating
Operating
Operating
Operating
Full
+25
°
C
Full
+25
°
C
Full
+4.75
+5
76
78
380
390
+5.25
88
90
460
470
V
mA
mA
mW
mW
Power Consumption
Thermal Resistance,
q
JA
28-Pin SOIC
75
°
C/W
Electrical Specifications
(continued)
at T
A
= +25
°
C, VDD = +5V, Sampling Rate = 40 Msps, with a 50% duty cycle clock having a 2ns rise/fall time,
unless otherwise noted.
Parameter
Conditions
Temp
Min
Typ
Max
Unit
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