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參數(shù)資料
| 型號(hào)： | TMC1185 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 10-Bit, 40 Msps Sampling Analog-to-Digital Converter(10位,采樣速率40Msps,A/D轉(zhuǎn)換器) |
| 中文描述： | 10位，40 Msps的采樣模擬到數(shù)字轉(zhuǎn)換器（10位，40Msps采樣速率，的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 2/20頁 |
| 文件大?。?/td> | 191K |
| 代理商： | TMC1185 |
TMC1185
PRODUCT SPECIFICATION
2
Functional Description
The TMC1185 is a high speed sampling analog-to-digital
converter with pipelining. It uses a fully differential architec-
ture and digital error correction to guarantee 10-bit resolu-
tion. The differential track/hold circuit is shown in Figure 1.
The switches are controlled by an internal clock which has
a non-overlapping two phase signal,
sampling time, the input signal is sampled on the bottom
plates of the input capacitors. In the next clock phase,
the bottom plates of the input capacitors are connected
together and the feedback capacitors are switched to the op
amp output. At this time the charge redistributes from C
C
H
, completing one track/hold cycle. The differential output
is a held DC representation of the analog input at the sample
time. The track/hold circuit can also convert a single-ended
input signal into a fully differential signal for the quantizer.
f
1 and
f
2. At the
f
2,
I
to
The pipelined quantizer architecture has 9 stages with each
stage containing a two-bit quantizer and a two bit digital-to-
analog converter, as shown in Figure 2. Each two-bit
quantizer stage converts on the edge of the sub-clock, which
is twice the frequency of the externally applied clock.
The output of each quantizer is fed into its own delay line to
Figure 2. Pipeline A/D Architecture
B9 (MSB)
B8
B7
B6
B5
B4
B3
B2
B1
B0 (LSB)
2-Bit
DAC
2-Bit
Flash
Input
T/H
Digital Delay
x2
x2
65-1185-03
2-Bit
DAC
2-Bit
Flash
Digital Delay
2-Bit
Flash
Digital Delay
2-Bit
DAC
2-Bit
Flash
Digital Delay
x2
D
IN
IN
STAGE 1
STAGE 2
STAGE 8
STAGE 9
S
+
–
S
–
S
+
–
Figure 1. Input Track/Hold
Configuration with Timing Signals
f
1
f
1
f
2
f
1
f
1
f
1
f
1
f
1
f
2
f
1
f
2
f
1
f
2
IN
65-1185-02
IN
OUT
OUT
Op Amp
Bias
V
CM
Op Amp
Bias
V
CM
C
H
C
I
C
I
C
H
Input Clock (50%)
Internal Non-overlapping Clock
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| TMC1200A | 制造商:TOPSTEK 制造商全稱:TOPSTEK 功能描述:Topstek Current Transducer |
| TMC1203 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Triple Video A/D Converter |
| TMC1203KLC20 | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 RoHS:否 制造商:Texas Instruments 輸入信號(hào)類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TMC1203KLC40 | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 Video a/D Converter Tripple 8Bit 4MSPS RoHS:否 制造商:Texas Instruments 輸入信號(hào)類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TMC1203KLC40_Q | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 Video a/D Converter Tripple 8Bit 4MSPS RoHS:否 制造商:Texas Instruments 輸入信號(hào)類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
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