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參數(shù)資料
| 型號： | TMB2193MS100 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Demonstration Board for the TMC2193 |
| 中文描述： | 演示板的TMC2193 |
| 文件頁數(shù)： | 4/24頁 |
| 文件大小： | 167K |
| 代理商： | TMB2193MS100 |
TMB2193MS100
PRODUCT SPECIFICATION
4
P
Setup Procedure
Set E1 to MPXCK and E2 to PASS, enable the onboard TTL
clock oscillator as the clock source.
1.
Set ESA1-0 to ON (down).
2.
Set P3-0 to 0h, P3 is ON (down), P2 is ON (down), P1 is
ON (down), and P0 is ON (down).
3.
Plug in power supply connector and apply power. The
LED’s corresponding to +5 Volts and -5 Volts should be
illuminated.
4.
Reset board by pressing the MRST button.
5.
Connect a scope probe to TP25 and adjust R39 until the
sync to blank amplitude is 286 mV.
6.
Connect a scope probe to TP19 and adjust R36 until the
sync to blank amplitude is 286 mV.
7.
Connect a scope probe to TP21 and adjust R37 until the
sync to blank amplitude is 286 mV.
8.
Connect a scope probe to TP23 and adjust R38 until the
burst amplitude is 286 mV.
Power Supply Requirements
The TMB2193MS100 board requires 1.5 Amps from the +5
Volt power supply and 0.5 Amps from the -5 Volt power sup-
ply. Both the +5 Volt and -5 Volt supplies are connected to
the input connector to supply the power requirements of any
upstream board. The +5 Volt power supply not only drives
TTL logic devices but it also provides the power and voltage
references to the D/A’s in the TMC2193. Therefore, it is rec-
ommended that a bench power supply be used with the cable
lengths kept to a minimum.
JP20, JP21, JP22,
JP23
When JPx is open, the output video is a single 75Ohm termination.
When JPx is closed, the output video is a double 75Ohm termination.
Description
Onboard Clock Selection.
Selects either the PXCK from the TMC2072 or the onboard TTL clock oscillator.
Master Clock Selection.
When Pass is selected the clock source for the entire board is either the TMC2072 PXCK
or the TTL clock oscillator. When IXPCK is selected the clock source for the entire board
is the PXCK from the input header.
Output Header Clock Selection.
Selects either PXCK or PXCK for the output header.
Description
Configures the bits 2 and 1 of the TMC2193 RBUS chip address. When SAx is ON
(down), ESAx is in a LOW state. When SAx is OFF (up), ESAx is in a HIGH state.
Configures the bit 2 of the TMC2072 RBUS chip address. When CAS is ON (down),
GSA1 is in a LOW state. When CAS is OFF (up), GSA1 is in a HIGH state.
Configures the bit 1 of the TMC2072 RBUS chip address. When ERS is ON (down),
GSA0 is in a LOW state. When ERS is OFF (up), GSA0 is in a HIGH state.
Control Register Programming.
P3-0 selects which control register map to configure the devices with. Refer to Table 1
Default Control Register Maps for a description.
Switches
E1
E2
E3
Dip Switches
SA1-0
CAS
ERS
P3-0
Table 4. Switch, Button, and Jumper Description
(continued)
Button
Description
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