參數(shù)資料
型號(hào)： TLV320DAC3202IYZJT
廠商： TEXAS INSTRUMENTS INC
元件分類： 音頻控制
英文描述： VOLUME CONTROL CIRCUIT, PBGA20
封裝： 2 X 2.50 MM, 0.50 MM PITCH, WCSP-20
文件頁(yè)數(shù)： 3/20頁(yè)
文件大小： 435K
代理商： TLV320DAC3202IYZJT
HSOUTL
HSOUTR
HSLDRV
HSRDRV
SD
DAC
R
SD
DAC
L
D
IG
M
IX
R
D
IG
M
IX
L
Gain
FLT
HSLDAC
HSRDAC
Class G
I2S
DIN
WCLK
HSL
HSR
BCLK
www.ti.com
SLAS726A – SEPTEMBER 2010 – REVISED JANUARY 2011
AUDIO
Channel Performance
The receive channel of TLV320DAC3202 converts the digital signal to analog for the headset amplifier through a
highly efficient low-power DAC. The signal in stereo I2S format with configurable data size drives the Class G
amplifier after the conversion. The channel gain is implemented in two segments in digital and analog domains.
In digital domain the gain steps have finer resolution whereas in the analog domain the amplifier gain steps are
defined at 2-dB resolution. The detail of volume control is shown in the register map description. The mixing
feature allows the left and right channels to be combined in digital domain prior to conversion and then routed to
either channel. The audio signal can be disabled either by soft mute feature in the digital domain or by disabling
the output amplifier.
Figure 11. Audio Path Diagram
Volume Control
The volume control module is implemented with combination of digital and analog gain settings for optimum
performance. The total gain range is from 4 dB to -59 dB with variable steps. The gain for the amplifiers is from 4
dB to -12 dB in 2-dB steps.
Table 8. Volume Control Register Decoding
REGISTER VALUE
GAIN (dB)
GAIN_ANALOG (dB)
GAIN_DIGITAL (dB)
31
4
0
30
3
4
-1
29
2
0
28
1
2
-1
27
0
26
-1
0
-1
25
-2
0
24
-3
-2
-1
23
-4
0
22
-5
-4
-1
21
-6
0
20
-7
-6
-1
19
-8
0
18
-9
-8
-1
17
-10
0
16
-11
-10
-1
15
-13
-12
-1
14
-15
-12
-3
13
-17
-12
-5
12
-19
-12
-7
11
-21
-12
-9
Copyright 2010–2011, Texas Instruments Incorporated
11
Product Folder Link(s): TLV320DAC3202
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