參數(shù)資料
型號(hào): TLV320DAC3120IRHBR
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): DAC
英文描述: SERIAL INPUT LOADING, 24-BIT DAC, PQCC32
封裝: 5 X 5 MM, PLASTIC, QFN-32
文件頁(yè)數(shù): 69/110頁(yè)
文件大?。?/td> 1230K
代理商: TLV320DAC3120IRHBR
www.ti.com
SLAS659 – NOVEMBER 2009
Page 0 / Register 48: INT1 Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Headset-insertion detect interrupt is not used in the generation of INT1 interrupt.
1: Headset-insertion detect interrupt is used in the generation of INT1 interrupt.
D6
R/W
0
0: Button-press detect interrupt is not used in the generation of INT1 interrupt.
1: Button-press detect interrupt is used in the generation of INT1 interrupt.
D5
R/W
0
0: DAC DRC signal-power interrupt is not used in the generation of INT1 interrupt.
1: DAC DRC signal-power interrupt is used in the generation of INT1 interrupt.
D4
R/W
0
Reserved
D3
R/W
0
0: Short-circuit interrupt is not used in the generation of INT1 interrupt.
1: Short-circuit interrupt is used in the generation of INT1 interrupt.
D2
R/W
0
0: Engine-generated interrupt is not used in the generation of INT1 interrupt.
1: Engine-generated interrupt is used in the generation of INT1 interrupt.
D1
R/W
0
Reserved
D0
R/W
0
0: INT1 is only one pulse (active-high) of typical 2-ms duration.
1: INT1 is multiple pulses (active-high) of typical 2-ms duration and 4-ms period, until flag registers 44
and 45 are read by the user.
Page 0 / Register 49: INT2 Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: Headset-insertion detect interrupt is not used in the generation of INT2 interrupt.
1: Headset-insertion detect interrupt is used in the generation of INT2 interrupt.
D6
R/W
0
0: Button-press detect interrupt is not used in the generation of INT2 interrupt.
1: Button-press detect interrupt is used in the generation of INT2 interrupt.
D5
R/W
0
0: DAC DRC signal-power interrupt is not used in the generation of INT2 interrupt.
1: DAC DRC signal-power interrupt is used in the generation of INT2 interrupt.
D4
R/W
0
Reserved
D3
R/W
0
0: Short-circuit interrupt is not used in the generation of INT2 interrupt.
1: Short-circuit interrupt is used in the generation of INT2 interrupt.
D2
R/W
0
0: Engine-generated interrupt is not used in the generation of INT2 interrupt.
1: Engine-generated interrupt is used in the generation of INT2 interrupt.
D1
R/W
0
Reserved
D0
R/W
0
0: INT2 is only one pulse (active-high) of typical 2-ms duration.
1: INT2 is multiple pulses (active-high) of typical 2-ms duration and 4-ms period, until flag registers 44
and 45 are read by the user.
Page 0 / Register 50: Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7-D0
R/W
0000 0000
Reserved. Write only reset values.
Copyright 2009, Texas Instruments Incorporated
REGISTER MAP
61
Product Folder Link(s): TLV320DAC3120
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