參數(shù)資料
型號(hào): TLV320AIC34_1
廠商: Texas Instruments, Inc.
元件分類: Codec
英文描述: FOUR-CHANNEL, LOW-POWER AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
中文描述: 四通道,低功耗音頻編解碼器的便攜式音頻/電話
文件頁(yè)數(shù): 68/94頁(yè)
文件大小: 905K
代理商: TLV320AIC34_1
www.ti.com
TLV320AIC34
SLAS538A–OCTOBER 2007–REVISED NOVEMBER 2007
Page 0 / Register 38:
High-Power Output Driver Control Register
READ/
WRITE
R
R/W
RESET
VALUE
00
000
BIT
DESCRIPTION
D7–D6
D5–D3
Reserved. Write only zeros to these register bits.
HPRCOM_x Output Driver Configuration Control
000: HPRCOM_x configured as differential of HPROUT_x
001: HPRCOM_x configured as constant VCM output
010: HPRCOM_x configured as independent single-ended output
011: HPRCOM_x configured as differential of HPLCOM_x
100: HPRCOM_x configured as external feedback with HPLCOM_x as constant VCM output
101–111: Reserved. Do not write these sequences to these register bits.
Short-Circuit Protection Control
0: Short-circuit protection on all high-power output drivers is disabled.
1: Short-circuit protection on all high-power output drivers is enabled.
Short-Circuit Protection-Mode Control
0:
If short-circuit protection is enabled, it limits the maximum current to the load.
1:
If short-circuit protection is enabled, it powers down the output driver automatically when a short is
detected.
Reserved. Write only zero to this register bit.
D2
R/W
0
D1
R/W
0
D0
R
0
Page 0 / Register 39:
Reserved Register
READ/
WRITE
R
RESET
VALUE
0000 0000
BIT
DESCRIPTION
D7–D0
Reserved. Do not write to this register.
Page 0 / Register 40:
High-Power Output Stage Control Register
READ/
WRITE
R/W
RESET
VALUE
00
BIT
DESCRIPTION
D7–D6
Output Common-Mode Voltage Control
00: Output common-mode voltage = 1.35 V
01: Output common-mode voltage = 1.5 V
10: Output common-mode voltage = 1.65 V
11: Output common-mode voltage = 1.8 V
LINE2L Bypass Path Control
00: LINE2L bypass is disabled.
01: LINE2L bypass uses LINE2LP_x single-ended.
10: LINE2L bypass uses LINE2LM_x single-ended.
11: LINE2L bypass uses LINE2LP_x and LINE2LM_x differentially.
LINE2R Bypass Path Control
00: LINE2R bypass is disabled.
01: LINE2R bypass uses LINE2RP_x single-ended.
10: LINE2R bypass uses LINE2RM_x single-ended.
11: LINE2R bypass uses LINE2RP_x and LINE2RM_x differentially.
Output Volume Control Soft-Stepping
00: Output soft-stepping = one step per sample period
01: Output soft-stepping = one step per two sample periods
10: Output soft-stepping disabled
11: Reserved. Do not write this sequence to these register bits.
D5–D4
R/W
00
D3–D2
R/W
00
D1–D0
R/W
00
68
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Copyright 2007, Texas Instruments Incorporated
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TLV320AIC34
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