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參數資料
| 型號： | TLV320AIC3110IRHBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | AUDIO AMPLIFIER, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 19/126頁 |
| 文件大?。?/td> | 1528K |
| 代理商： | TLV320AIC3110IRHBR |
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SLAS647 – DECEMBER 2009
6.7
Control Registers, Page 9: DAC Digital Filter Coefficients
Default values shown for this page only become valid 100
μs following a hardware or software reset.
Page 9 / Register 0 (0x00): Page Control Register
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
0000 0000: Page 0 selected
0000 0001: Page 1 selected
...
1111 1110: Page 254 selected
1111 1111: Page 255 selected
The remaining page 9 registers are either reserved registers or are used for setting coefficients for the
various filters in the TLV320AIC3110. Reserved registers should not be written to.
The filter coefficient registers are arranged in pairs, with two adjacent 8-bit registers containing the 16-bit
coefficient for a single filter. The 16-bit integer contained in the MSB and LSB registers for a coefficient
are interpreted as a 2s-complement integer, with possible values ranging from –32,768 to 32,767. When
programming any coefficient value for a filter, the MSB register should always be written first, immediately
followed by the LSB register. Even if only the MSB or LSB portion of the coefficient changes, both
registers should be written in this sequence. Table 6-7 is a list of the page-9 registers, excepting the
previously described register 0.
Table 6-7. Page 9 DAC Buffer A Registers
REGISTER
RESET VALUE
REGISTER NAME
NUMBER
1
XXXX XXXX
Reserved. Do not write to this register.
2 (0x02)
0111 1111
8 MSBs of n0 coefficient for left DAC-programmable first-order IIR
3 (0x03)
1111 1111
8 LSBs of n0 coefficient for left DAC-programmable first-order IIR
4 (0x04)
0000 0000
8 MSBs of n1 coefficient for left DAC-programmable first-order IIR
5 (0x05)
0000 0000
8 LSBs of n1 coefficient for left DAC-programmable first-order IIR
6 (0x06)
0000 0000
8 MSBs of d1 coefficient for left DAC-programmable first-order IIR
7 (0x07)
0000 0000
8 LSBs of d1 coefficient for left DAC-programmable first-order IIR
8 (0x08)
0111 1111
8 MSBs of n0 coefficient for right DAC-programmable first-order IIR
9 (0x09)
1111 1111
8 LSBs of n0 coefficient for right DAC-programmable first-order IIR
10 (0x0A)
0000 0000
8 MSBs of n1 coefficient for right DAC-programmable first-order IIR
11 (0x0B)
0000 0000
8 LSBs of n1 coefficient for right DAC-programmable first-order IIR
12 (0x0C)
0000 0000
8 MSBs of d1 coefficient for right DAC-programmable first-order IIR
13 (0x0D)
0000 0000
8 LSBs of d1 coefficient for right DAC-programmable first-order IIR
14 (0x0E)
0111 1111
8 MSBs of n0 coefficient for DRC first-order high-pass filter
15 (0x0F)
1111 0111
8 LSBs of n0 coefficient for DRC first-order high-pass filter
16 (0x10)
1000 0000
8 MSBs of n1 coefficient for DRC first-order high-pass filter
17 (0x11)
0000 1001
8 LSBs of n1 coefficient for DRC first-order high-pass filter
18 (0x12)
0111 1111
8 MSBs of d1 coefficient for DRC first-order high-pass filter
19 (0x13)
1110 1111
8 LSBs of d1 coefficient for DRC first-order high-pass filter
20 (0x14)
0000 0000
8 MSBs of n0 coefficient for DRC first-order low-pass filter
21 (0x15)
0001 0001
8 LSBs of n0 coefficient for DRC first-order low-pass filter
22 (0x16)
0000 0000
8 MSBs of n1 coefficient for DRC first-order low-pass filter
23 (0x17)
0001 0001
8 LSBs of n1 coefficient for DRC first-order low-pass filter
24 (0x18)
0111 1111
8 MSBs of d1 coefficient for DRC first-order low-pass filter
25 (0x19)
1101 1110
8 LSBs of d1 coefficient for DRC first-order low-pass filter
26-127
0000 0000
Reserved
Copyright 2009, Texas Instruments Incorporated
REGISTER MAP
115
Product Folder Link(s): TLV320AIC3110
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| TLV320AIC3110IRHBT | 功能描述:接口—CODEC Low-Pwr Audio Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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