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參數(shù)資料
| 型號： | TLV320AD11APZ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | Codec |
| 英文描述： | 3.3 V INTEGRATED ADSL OVER POTS CODEC |
| 中文描述： | 3.3伏集成ADSL POTS和編解碼器 |
| 文件頁數(shù)： | 12/28頁 |
| 文件大?。?/td> | 412K |
| 代理商： | TLV320AD11APZ |
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TLV320AD11A
3.3 V INTEGRATED ADSL OVER POTS CODEC
SLWS087B – JUNE 1999 – REVISED MARCH 2000
12
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
register programming (continued)
SCR2 – RX PGA2 control register (continued) Address:0010b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
REGISTER
VALUE (HEX)
2A
2B
2C
2D
2E
2F–FF
DESCRIPTION
0
0
0
0
0
–
0
0
0
0
0
–
1
1
1
1
1
–
0
0
0
0
0
–
1
1
1
1
1
–
0
0
1
1
1
–
1
1
0
0
1
–
0
1
0
1
0
–
RX PGA2 = 10.5 dB
RX PGA2 = 10.75 dB
RX PGA2 = 11 dB
RX PGA2 = 11.25 dB
RX PGA2 = 11.5 dB
RX PGA2 = 11.5 dB
SCR3 – RX EQ control register
Address:0011b
Contents at reset: 00000000b
D7
D6
D5
D4
D3
D2
D1
D0
REGISTER
VALUE (HEX)
DESCRIPTION
0
0
0
0
0
0
0
0
00
RX EQ = 0 dB/MHz
0
0
0
0
0
0
0
1
01
RX EQ = 5 dB/MHz
0
0
0
0
0
0
1
0
02
RX EQ = 10 dB/MHz
0
0
0
0
0
0
1
1
03
RX EQ = 15 dB/MHz
0
0
0
0
0
1
0
0
04
RX EQ = 20 dB/MHz
0
0
0
0
0
1
0
1
05
RX EQ = 25 dB/MHz
–
–
–
–
–
–
–
–
06–FF
RX EQ = 25 dB/MHz
SCR4 – VCXO data register
SCR5 – VCXO data register
Address:0100b
Address:0101b
Contents at reset: 00000000b
Contents at reset: 00000000b
The following table shows some representative analog outputs. Notice that the read-back values of SCR4 and
SCR5 are different from the values written in.
Table 3. VCXODAC Digital-Analog Mapping
OPERATION
HEX RESULT
ANALOG OUTPUT
(see Note 2 and 3)
COMMENTS
0x800
0 V
V
...
Min scale
0x801
Just above min
...
...
0xFFF
2047
V
2048
V
2049
V
...
4094
V
4095
V
Just below mid
SRC5[7:0]
×
24 + SCR4[7:0]
0x000
Mid scale
0x001
Just above mid
...
...
0x7FE
0x7FF
Just below max
Max scale
NOTES:
2.
= (3/4095) V
3. The analog output is computed as follows:
((SCR%[7:0]
×
24 + SCR4[7:0])) + 2048(decimal)
×
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