參數(shù)資料
型號(hào)： TLC34058-110M
廠商： Texas Instruments, Inc.
英文描述： 256 ?24 COLOR PALETTE
中文描述： 256？24調(diào)色板
文件頁(yè)數(shù)： 20/21頁(yè)
文件大?。?/td> 322K
代理商： TLC34058-110M
TLC34058-110M
256
×
24 COLOR PALETTE
SGLS075 – JANUARY 1994
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PRINCIPLES OF OPERATION
test register
The test register allows the MPU to read the inputs to the DAC for diagnostic purposes. The MPU can write to
or read from this register at any time. This register is not initialized. Only the four least significant bits can be
written to, while all eight bits can be read. Test-register bit 0 corresponds to data-bus line D0. A function
description of this register is presented in Table 8.
Table 8. Functional Description of Test Register
TR3–TR0
0100
0010
D4–D7
FUNCTION
4 MSBs of blue data input
4 MSBs of green data input
MPU read or write D0–D3
D0 D3
0001
4 MSBs of red data input
1100
4 LSBs of blue data input
MPU
d D0 D7
1010
4 LSBs of green data input
1001
4 LSBs of red data input
To read the DAC inputs, the MPU must first load the test register four least significant bits. One of the test register
bits, b0 (red DAC), b1 (green DAC), or b2 (blue DAC), must be set high and the other two bits low. This process
determines whether the inputs to the red, green, or blue DAC are read. The test register bit b3 must be set high
for reading the four most significant DAC inputs or low for reading the four least significant inputs. The MPU then
reads the test register while the test register’s four least significant bits contain the previously written information.
Either the device clock must be slowed down to the MPU cycle time or the same pixel and overlay data must
be continuously presented to the device during the entire MPU read cycle.
SGLS075
P20
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TLC34058-110MGA 制造商:TI 制造商全稱:Texas Instruments 功能描述:256 x 24 COLOR PALETTE
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TLC34058-110MHFG 制造商:TI 制造商全稱:Texas Instruments 功能描述:256 x 24 COLOR PALETTE
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