參數(shù)資料
型號(hào)： TLC34058-110M
廠商： Texas Instruments, Inc.
英文描述： 256 ?24 COLOR PALETTE
中文描述： 256？24調(diào)色板
文件頁數(shù)： 15/21頁
文件大?。?/td> 322K
代理商： TLC34058-110M
TLC34058-110M
256
×
24 COLOR PALETTE
SGLS075 – JANUARY 1994
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PRINCIPLES OF OPERATION
Table 1. Writing to or Reading From Palette RAM
R/W
C1
C0
ADDRb
ADDRa
FUNCTION
L
L
L
X
X
Write ADDR0–ADDR7: D0–D7
→
ADDR0–ADDR7; 0
→
ADDRa,b
Write red color: D0–D7
→
RREG; increment ADDRa,b
Write green color: D0–D7
→
GREG; increment ADDRa,b
Write blue color: D0–D7
→
BREG; increment ADDRa,b; increment ADDR0–ADDR7; write
paletteRAM
L
L
H
L
L
L
L
H
L
H
L
L
H
H
L
H
L
L
X
X
Read ADDR0–ADDR7: ADDR0–ADDR7
→
D0–D7; 0
→
ADDRa,b
Read red color: R0–R7
→
D0–D7; increment ADDRa,b
Read green color: G0–G7
→
D0–D7; increment ADDRa,b
Read blue color: B0–B7
→
D0–D7; increment ADDRa,b; increment ADDR0–ADDR7
H
L
H
L
L
H
L
H
L
H
H
L
H
H
L
X = irrelevant
overlay-register write/read
With a few exceptions, the overlay-register operation is identical to the palette-RAM write/read operation (refer
to the palette-RAM write/read section). Upon writing to or reading from the internal-address register, the
additional-address register ADDRab is automatically reset to 0. ADDRab counts modulo 3 as the red, green,
and blue information is written to or read from a particular overlay register. The four overlay registers are
addressed with internal-address-register values 00–03. After writing/reading blue information, the
internal-address register bits ADDR0–ADDR7 are incremented to the next overlay location. After accessing
overlay register value 03, the internal address register does not reset to 00 but is advanced to 04.
For writing to or reading from the internal-address register, C0 and C1 are set low. When accessing the overlay
registers, C0 and C1 are set high. Refer to Table 2 for a quick reference.
Table 2. Writing to or Reading From Overlay Registers
R/W
L
L
L
C1
L
H
H
C0
L
H
H
ADDRb
X
L
L
ADDRa
X
L
H
FUNCTION
Write ADDR0–ADDR7: D0–D7
→
ADDR0–7; 0
→
ADDRa,b
Write red color: D0–D7
→
RREG; increment ADDRa,b
Write green color: D0–D7
→
GREG; increment ADDRa,b
Write blue color: D0–D7
→
BREG; increment ADDRa,b; increment ADDR0–ADDR7; write
overlay register
Read ADDR0–ADDR7: ADDR0–ADDR7
→
D0–D7; 0
→
ADDRa,b
Read red color: R0–R7
→
D0–D7; increment ADDRa,b
Read green color: G0–G7
→
D0–D7; increment ADDRa,b
→
D0–D7; increment ADDRa b; increment ADDR0–ADDR7
Read blue color: B0–B7
D0–D7; increment ADDRa,b; increment ADDR0–ADDR7
L
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
H
X
L
L
H
X
L
H
L
X = irrelevant
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