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0
500
1000
1500
2000
2500
100 k
1 M
f Frequency Hz
10 M
100 M
1 G
+
1.21 k
1.21 k
50
V
O
ZO
V
S
=
±
15 V and
±
5 V
POWER-DOWN REFERENCE PIN
OPERATION
In addition to the power-down pin, the THS3095
features a reference pin (REF) which allows the user
to control the enable or disable power-down voltage
levels applied to the PD pin. In most split-supply
applications, the reference pin is connected to
ground. In either case, the user needs to be aware of
voltage-level thresholds that apply to the power-down
pin. The usable range at the REF pin is from V
S-
to
(V
S+
- 4 V).
PRINTED-CIRCUIT BOARD LAYOUT
TECHNIQUES FOR OPTIMAL
THS3091
THS3095
SLOS423C–SEPTEMBER 2003–REVISED AUGUST 2004
PERFORMANCE
Achieving
high-frequency amplifier, like the THS3091/5, re-
quires careful attention to board layout parasitic and
external component types.
optimum
performance
with
a
Recommendations that optimize performance include:
Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance
on the output and input pins can cause instability.
To reduce unwanted capacitance, a window
around the signal I/O pins should be opened in all
of the ground and power planes around those
pins. Otherwise, ground and power planes should
be unbroken elsewhere on the board.
Minimize the distance (< 0.25 in.) from the power
supply pins to high-frequency 0.1-μF and 100-pF
decoupling capacitors. At the device pins, the
ground and power plane layout should not be in
close proximity to the signal I/O pins. Avoid
narrow power and ground traces to minimize
inductance between the pins and the decoupling
capacitors. The power supply connections should
always be decoupled with these capacitors.
Larger (6.8 μF or more) tantalum decoupling
capacitors, effective at lower frequency, should
also be used on the main supply pins. These may
be placed somewhat farther from the device and
may be shared among several devices in the
same area of the PC board.
Careful selection and placement of external
components
preserve
performance of the THS3091/5. Resistors should
be a low reactance type. Surface-mount resistors
work best and allow a tighter overall layout.
Again, keep their leads and PC board trace
length as short as possible. Never use wirebound
type resistors in a high-frequency application.
Because the output pin and inverting input pins
are the most sensitive to parasitic capacitance,
always position the feedback and series output
resistors, if any, as close as possible to the
inverting input pins and output pins. Other net-
work components, such as input termination re-
sistors, should be placed close to the gain-setting
resistors. Even with a low parasitic capacitance
shunting
the
excessively high resistor values can create sig-
nificant time constants that can degrade perform-
ance. Good axial metal-film or surface-mount
resistors have approximately 0.2 pF in shunt with
the resistor. For resistor values > 2 k
, this
parasitic capacitance can add a pole and/or a
zero that can effect circuit operation. Keep re-
sistor values as low as possible, consistent with
load-driving considerations.
Connections to other wideband devices on the
board may be made with short direct traces or
Figure 70. Power-down Output Impedance vs
Frequency
As with most current feedback amplifiers, the internal
architecture places some limitations on the system
when in power-down mode. Most notably is the fact
that the amplifier actually turns
ON
if there is a
±
0.7 V
or greater difference between the two input nodes
(V+ and V-) of the amplifier. If this difference exceeds
±
0.7 V, the output of the amplifier creates an output
voltage
equal
[(V+ - V-) -0.7 V]
×
Gain. This also implies that if a
voltage is applied to the output while in power-down
mode,
the
V-
node
V
O(applied)
×
R
G
/(R
F
+ R
G
). For low gain configurations
and a large applied voltage at the output, the
amplifier
may
actually
aforementioned behavior.
to
approximately
voltage
is
equal
to
turn
ON
due
to
the
the
high-frequency
The time delays associated with turning the device on
and off are specified as the time it takes for the
amplifier to reach either 10% or 90% of the final
output voltage. The time delays are in the order of
microseconds because the amplifier moves in and out
of the linear mode of operation in these transitions.
external
resistors,
22