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參數(shù)資料
| 型號： | TFP513PAPG4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | TI PANELBUS DIGITAL TRANSMITTER |
| 中文描述： | 德州儀器PANELBUS數(shù)字發(fā)射機(jī) |
| 文件頁數(shù)： | 9/29頁 |
| 文件大?。?/td> | 424K |
| 代理商： | TFP513PAPG4 |
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SLLS611 AUGUST 2004
9
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing diagrams
tr
tf
80% VOD
20% VOD
DVI
Outputs
Figure 1. Rise and Fall Time for DVI Outputs
th(IDF)
tsu(IDF)
th(IDR)
tsu(IDR)
VIH
VIL
IDCK+
DATA[23:0], DE,
HSYNC, VSYNC
IDCK
Figure 2. Control and Single-Edge-Data Setup/Hold Time to IDCK
±
tsu(ID)
th(ID)
VIH
VIL
IDCK+
DATA[23:0], DE,
HSYNC, VSYNC
th(ID)
tsu(ID)
Figure 3. Dual-Edge Data Setup/Hold Times to IDCK+
tsk(D)
50%
TX+
TX
Figure 4. Analog Output Intra-Pair
±
Differential Skew
tsk(CC)
50%
50%
TXN
TXM
Figure 5. Analog Output Channel-to-Channel Skew
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