參數(shù)資料
型號(hào)： TFP513PAPG4
廠商： Texas Instruments, Inc.
英文描述： TI PANELBUS DIGITAL TRANSMITTER
中文描述： 德州儀器PANELBUS數(shù)字發(fā)射機(jī)
文件頁(yè)數(shù)： 7/29頁(yè)
文件大?。?/td> 424K
代理商： TFP513PAPG4
SLLS611 AUGUST 2004
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
dc specifications
PARAMETERS
TEST CONDITIONS
MIN
TYP
MAX
UNIT
High-level input voltage (DATA, DE, VSYNC,
HSYNC, and IDCK
±
)
VREF = DVDD
0.55 V
≤
VREF
≤
0.9 V
0.7VDD
VREF + 0.2
0.7VDD
VIH
V
High-level input voltage (other inputs)
Low-level input voltage (DATA, DE, VSYNC,
HSYNC, and IDCK
±
)
VREF = DVDD
0.55 V
≤
VREF
≤
0.9 V
0.3 VDD
VREF 0.2
0.3 VDD
VIL
V
Low-level input voltage (other inputs)
VOH
High-level digital output voltage (open-drain output)
VDD = 3 V
IOH = 20
μ
A
VDD = 3.6 V
IOL = 4 mA
VI = 3.6 V
VI = 0
2.4
V
VOL
Low-level digital output voltage (open-drain output)
0.4
V
IIH
IIL
V(H)
V(L)
V(SWING)
V(OFF)
I(PD)
I(IDD)
R(T) is the single-ended termination resistance at the receiver end of the DVI link.
§Black and white checkerboard pattern, each checker is one pixel wide.
NOTE 3: Assumes all inputs to the transmitter are not toggling.
High-level input current
±
25
μ
A
Low-level input current
±
25
μ
A
DVI single-ended high-level output voltage
AVDD – 0.01
AVDD – 0.6
AVDD + 0.01
AVDD 0.4
V
DVI single-ended low-level output voltage
AVDD = 3.3 V
±
5%
R(TFADJ) = 510
±
1%
V
DVI single-ended output swing voltage
R(T) = 50
±
10%
400
600
mVPP
V
DVI single-ended standby/off output voltage
AVDD – 0.01
AVDD + 0.01
Power-down current (see Note 3)
200
500
μ
A
Normal power supply current
Worst case pattern§
200
250
mA
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