參數(shù)資料
型號(hào)： TE28F160S3-120
廠商： INTEL CORP
元件分類： DRAM
英文描述： 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor
中文描述： 1M X 16 FLASH 2.7V PROM, 120 ns, PDSO56
封裝： 14 X 20 MM, TSOP-56
文件頁(yè)數(shù)： 48/52頁(yè)
文件大小： 1262K
代理商： TE28F160S3-120
28F160S3, 28F320S3
E
48
ADVANCE INFORMATION
6.2.6
RESET OPERATIONS
Figure 19. AC Waveform for Reset Operation
Table 22. Reset AC Specifications
(1)
V
CC
= 2.7V
V
CC
= 3.3V
#
Sym
Parameter
Notes
Min
Max
Min
Max
Unit
P1
t
PLPH
RP# Pulse Low Time
(If RP# is tied to V
CC
, this specification is
not applicable)
100
100
ns
P2
t
PLRH
RP# Low to Reset during Block Erase,
Program, or Lock-Bit Configuration
2,3
20
20
μs
P3
t
3VPH
V
CC
at 2.7V to RP# High
V
CC
at 3.0V to RP# High
50
50
μs
NOTES:
1.
2.
These specifications are valid for all product versions (packages and speeds).
If RP# is asserted while a block erase, program, or lock-bit configuration operation is not executing, the reset will
complete within t
PLPH
.
A reset time, t
PHQV
, is required from the latter of STS in RY/BY# mode or RP# going high until outputs are valid.
3.
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