參數(shù)資料
型號(hào)： TE28F160S3-120
廠商： INTEL CORP
元件分類： DRAM
英文描述： 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor
中文描述： 1M X 16 FLASH 2.7V PROM, 120 ns, PDSO56
封裝： 14 X 20 MM, TSOP-56
文件頁數(shù)： 22/52頁
文件大?。?/td> 1262K
代理商： TE28F160S3-120
28F160S3, 28F320S3
E
22
ADVANCE INFORMATION
4.2.5
SYSTEM INTERFACE INFORMATION
The following device information can be useful in
optimizing system interface software.
Table 9. System Interface Information
Offset
Length
(bytes)
Description
28F320S3/
28F160S3
1Bh
01h
V
CC
Logic Supply Minimum Program/Erase Voltage
bits 7
–4 BCD volts
bits 3–0 BCD 100 mv
1B:
0030h
1Ch
01h
V
CC
Logic Supply Maximum Program/Erase Voltage
bits 7–4 BCD volts
bits 3–0
BCD 100 mv
1C:
0055h
1Dh
01h
V
PP
[Programming] Supply Minimum Program/Erase Voltage
bits 7–4 HEX volts
bits 3–0 BCD 100 mv
1D:
0030h
1Eh
01h
V
PP
[Programming] Supply Maximum Program/Erase Voltage
bits 7–4 HEX volts
bits 3–0 BCD 100 mv
1E:
0055h
1Fh
01h
Typical Time-Out per Single Byte/Word Program, 2
N
μ-sec
1F:
0003h
20h
01h
Typical Time-Out for Max. Buffer Write, 2
N
μ-sec
20:
0006h
21h
01h
Typical Time-Out per Individual Block Erase,
2
N
m-sec
21:
000Ah
22h
01h
Typical Time-Out for Full Chip Erase, 2
N
m-sec
22:
000Fh
23h
01h
Maximum Time-Out for Byte/Word Program,
2
N
Times Typical
23:
TBD
24h
01h
Maximum Time-Out for Buffer Write, 2
N
Times Typical
24:
TBD
25h
01h
Maximum Time-Out per Individual Block Erase,
2
N
Times Typical
25:
TBD
26h
01h
Maximum Time-Out for Chip Erase, 2
N
Times Typical
26:
TBD
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