參數(shù)資料
型號(hào): TE28F160B3B90
廠商: INTEL CORP
元件分類: DRAM
英文描述: SMART 3 ADVANCED BOOT BLOCK 4-, 8-, 16-, 32-MBIT FLASH MEMORY FAMILY
中文描述: 1M X 16 FLASH 2.7V PROM, 90 ns, PDSO48
封裝: 12 X 20 MM, TSOP-48
文件頁(yè)數(shù): 33/48頁(yè)
文件大小: 304K
代理商: TE28F160B3B90
E
5.0
SMART 3 ADVANCED BOOT BLOCK
33
PRELIMINARY
RESET OPERATIONS
IH
V
IL
V
RP# (P)
PLPH
t
IH
V
IL
V
RP# (P)
PLPH
t
(A) Reset during Read Mode
Abort
Complete
PLRH
PHQV
PHWL
PHEL
t
t
t
PHQV
PHWL
PHEL
t
t
t
(B) Reset during Program or Block Erase, <
PLPH
PLRH
t
t
IH
V
IL
V
RP# (P)
PLPH
t
Abort
Complete
PHQV
PHWL
PHEL
t
t
t
PLRH
t
Deep
Power-
Down
(C) Reset Program or Block Erase, >
PLRH
t
0580_09
Figure 9. AC Waveform: Deep Power-Down/Reset Operation
Reset Specifications
V
CC
= 2.7 V
–3.6 V
Symbol
Parameter
Notes
Min
Max
Unit
t
PLPH
RP# Low to Reset during Read
(If RP# is tied to V
CC
, this specification is not applicable)
1,3
100
ns
t
PLRH
NOTES:
1.
2.
3.
RP# Low to Reset during Block Erase or Program
2,3
22
μs
If t
PLPH
is <100 ns the device may still RESET but this is not guaranteed.
If RP# is asserted while a block erase or
word program operation is not executing, the reset will complete within 100 ns.
Sampled, but not 100% tested.
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