參數(shù)資料
型號(hào)： TDA9887TS/V3
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 接收器
英文描述： AM/FM, AUDIO/VIDEO DEMODULATOR, PDSO24
封裝： 5.30 MM, PLASTIC, MO-150, SOT-340-1, SSOP-24
文件頁(yè)數(shù)： 56/56頁(yè)
文件大?。?/td> 230K
代理商： TDA9887TS/V3
2002 Mar 05
9
Philips Semiconductors
Product specication
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
TDA9887TS
8
FUNCTIONAL DESCRIPTION
Figure 1 shows the simplified block diagram of the device
which comprises the following functional blocks:
1. VIF amplifier
2. Tuner AGC and VIF-AGC
3. VIF-AGC detector
4. Frequency Phase-Locked Loop (FPLL) detector
5. VCO and divider
6. AFC and digital acquisition help
7. Video demodulator and amplifier
8. Sound carrier trap
9. SIF amplifier
10. SIF-AGC detector
11. Single reference QSS mixer
12. AM demodulator
13. FM demodulator and acquisition help
14. Audio amplifier and mute time constant
15. Radio mode
16. Internal voltage stabilizer
17. I2C-bus transceiver and MAD (module address).
8.1
VIF amplier
The VIF amplifier consists of three AC-coupled differential
stages. Gain control is performed by emitter degeneration.
The total gain control range is typical 66 dB. The
differential input impedance is typical 2 k
in parallel with
3 pF.
8.2
Tuner AGC and VIF-AGC
This block adapts the voltages, generated at the VIF-AGC
and SIF-AGC detectors, to the internal signal processing
at the VIF and SIF amplifiers and performs the tuner AGC
control current generation. The onset of the tuner AGC
control current generation can be set either via the I2C-bus
(see Table 13) or optional by a potentiometer at pin TOP
(in case that the I2C-bus information cannot be stored,
related to the device). The presence of a potentiometer will
automatically be detected and disables the I2C-bus
setting.
Furthermore, derived from the AGC detector voltage, a
comparator is used to test the corresponding VIF input
voltage to be higher than 200
V. This information can be
read out via the I2C-bus (bit VIFLEV = 1).
8.3
VIF-AGC detector
Gain control is performed by sync level detection (negative
modulation) or peak white detection (positive modulation).
For negative modulation, the sync level voltage is stored at
an integrated capacitor by means of a fast peak detector.
This voltage is compared with a reference voltage
(nominal sync level) by a comparator which charges or
discharges the integrated AGC capacitor for the
generation of the required VIF gain. The time constants for
decreasing or increasing the gain are nearly equal and the
total AGC reaction time is fast to cope with ‘a(chǎn)eroplane
fluttering’.
For positive modulation, the white peak level voltage is
compared with a reference voltage (nominal white level)
by a comparator which charges (fast) or discharges (slow)
the external AGC capacitor directly for the generation of
the required VIF gain. The need of a very large time
constant for VIF gain increase is caused by the fact that
the peak white level may appear only once in a field. In
order to reduce this time constant, an additional level
detector increases the discharging current of the AGC
capacitor (fast mode) in the event of a decreasing VIF
amplitude step controlled by the detected actual black
level voltage. The threshold level for fast mode AGC is
typical
6 dB video amplitude. The fast mode state is also
transferred to the SIF-AGC detector for speed-up. In case
of missing peak white pulses, the VIF gain increase is
limited to typical +3 dB by comparing the detected actual
black level voltage with a corresponding reference voltage.
8.4
FPLL detector
The VIF amplifier output signal is fed into a frequency
detector and into a phase detector via a limiting amplifier
for removing the video AM.
During acquisition the frequency detector produces a
current proportional to the frequency difference between
the VIF and the VCO signal. After frequency lock-in the
phase detector produces a current proportional to the
phase difference between the VIF and the VCO signal.
The currents from the frequency and phase detector are
charged into the loop filter which controls the VIF VCO and
locks it to the frequency and phase of the VIF carrier.
For a positive modulated VIF signal, the charging currents
are gated by the composite sync in order to avoid signal
distortion in case of overmodulation. The gating depth is
switchable via the I2C-bus.
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