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參數(shù)資料
| 型號： | TDA9875AH |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Digital TV Sound Processor DTVSP |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, QFP |
| 文件頁數(shù)： | 85/96頁 |
| 文件大小： | 296K |
| 代理商： | TDA9875AH |
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1999 Dec 20
85
Philips Semiconductors
Product specification
Digital TV Sound Processor (DTVSP)
TDA9875A
10.4.9
T
EST REGISTER
1
This register contains, as a binary number, the highest
subaddress used for slave transmitter (status) registers.
Table 99
Subaddress 253
10.4.10 D
EVICE IDENTIFICATION CODE
There will be several devices in the digital TV sound
processorfamily. Thisbyteis usedto identify theindividual
family members.
Table 100
Subaddress 254
10.4.11 S
OFTWARE IDENTIFICATION CODE
It is likely that during the life time of this family of devices
several versions of the DSP software will be made, e.g., to
accommodate new application concepts, respond to
customer wishes, etc. This byte is used to identify the
different releases.
Table 101
Subaddress 255
10.5
Expert mode
In addition to the slave receiver and slave transmitter
modes previously described, there is a special ‘expert’
mode that gives direct write access to the internal CRAM
of the DSP.
In this mode, transferred data contain 12-bit coefficients.
As these coefficients bypass on-chip coefficient look-up
tables for many functions, they directly influence the
processing of signals within the DSP.
This mode must be used with great care. It can be used to
create user-defined characteristics, such as a tone control
with different corner frequencies or special boost/cut
characteristics to correct the low-frequency loudspeaker
and/or cabinet frequency responses.
As the coefficients do not fit into one data byte, they have
to be split and arranged (see Table 104). The most
significant bit is transferred first.
The general format described in Table 104 shows the
minimum number of data bytes required, i.e. two bytes for
the transfer of a single coefficient.
Should more than one coefficient be sent, then the CRAM
address will be automatically incremented after each
coefficient, resulting in writing the sequence of coefficients
into successive memory locations, starting at
CRAM ADDRESS. A transmission can start with any valid
CRAM address. If two coefficients are to be transferred,
they are arranged as shown in Table 105.
With any odd number of coefficients to be transferred, the
least significant nibble of the last byte is regarded as
containing don’t care data.
As the transfer of coefficients cannot be accomplished
within one audio sample period, it is necessary that
receivedcoefficientsbebufferedandmadeactiveallatthe
same time to avoid audio signal transients. The receive
buffer is designed to store up to 8 coefficients in addition
to the CRAM address. Each byte that fits into the buffer is
acknowledged with ACK (acknowledge). If an attempt is
made to write more coefficients than the buffer can store,
the device acknowledges with NACK (not acknowledge)
and any further coefficients are ignored. Coefficients that
are already in the receive buffer remain intact.
An expert mode transfer ends when the I
2
C-bus STOP
condition or a repeated START condition has been
detected. Only those coefficients that have been received
during the last transmission will then be copied from the
buffer to the CRAM.
To make efficient and correct use of the expert mode, it is
recommended to transfer all coefficients for any one
function in a single transmission.
There is no checking of memory addresses and the
automatic incrementing of addresses does not stop at the
highestused CRAMaddress. Theuser ofthisexpert mode
must be fully acquainted with the relevant procedures.
More information concerning the functions of this device,
such as the number of coefficients per function, their
default values, memory addresses, etc., can be supplied
on request at a later date.
MSB
LSB
B7
B6
B5
B4
B3
B2
B1
B0
0
0
0
0
0
1
1
1
MSB
LSB
B7
B6
B5
B4
B3
B2
B1
B0
0
0
0
0
0
0
1
0
MSB
LSB
B7
B6
B5
B4
B3
B2
B1
B0
0
0
0
0
0
0
1
0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TDA9875AH/V2,557 | 功能描述:IC SOUND PROC DGTL TV 64QFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:- 其它有關文件:STA321 View All Specifications 標準包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應商設備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| TDA9880 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Alignment-free multistandard vision and FM sound IF-PLL demodulator |
| TDA9880T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Alignment-free multistandard vision and FM sound IF-PLL demodulator |
| TDA9881 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Alignment-free vision and FM sound IF PLL demodulator for negative modulated TV standards |
| TDA9881HN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Alignment-free vision and FM sound IF PLL demodulator for negative modulated TV standards |
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